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From: Jeremy Kerr <jk@codeconstruct.com.au>
To: Joe Komlodi <komlodi@google.com>
Cc: qemu-devel@nongnu.org, venture@google.com, peter.maydell@linaro.org
Subject: Re: [PATCH 14/16] hw/i3c: remote_i3c: Add model
Date: Wed, 05 Apr 2023 10:44:53 +0800	[thread overview]
Message-ID: <dc3f421cfa0aa9bc2e417ff7872fa68a311548b2.camel@codeconstruct.com.au> (raw)
In-Reply-To: <CAGDLtxuwJndMS_L1xWz9TWadA_T4SK3Rb6cExJf9+4jJ1ssQQg@mail.gmail.com>

Hi Joe,

> > 1) Is this something that qemu upstream would accept? Do we need a
> > formal description of the guest-to-host interface somewhere? Or is there
> > a more standard way of exposing busses like this?
> > 
> Not sure! I'm open to ideas.
> I think the most controversial portion of the remote target like this
> might be doing socket transfers in an MMIO context.
> i.e. driver does a write to I3C controller -> triggers a transaction
> to remote target -> remote target sends/reads data over socket.
> 
> Because of that, we might need to add a way to do these transactions
> asynchronously.

OK, that plus the general concept of having a socket interface to the i3c
bus might need a review from someone above my qemu pay-grade.

but, on the assumption that those are acceptable in general:

> > Assuming we do adopt your approach though, I think the protocol
> > description needs some work. There seems to be other messages not listed
> > in your protocol comments, and the direction of some seems to be
> > reversed. I'm happy to contribute to that documentation if you like.
> 
> Oops. I'll reread and revise in v2. If you have anything else you want
> to add too, let me know and I'll add them as well.

So I implemented a little daemon for the other side of the socket
interface. I have a few thoughts on the protocol structure:

 * can we change the target -> controller read response messages (data +
   len) into a normal message type (ie, assign an opcode and use that in
   the header)? We may want to use separate opcodes for each response
   type.

 * I would suggest expanding the start behaviour a little: the message
   could contain the target address, and the target responds with an
   ACK/NACK event. The model would need to block on the response in
   order to return the correct ACK/NACK value (and pass to the
   hardware), but this means we can either implement the protocol at the
   bus level, or at the individual-device level.

   (with the current standalone NACK event, I don't see how a model
   could reliably handle that)

 * I'm not clear on why the RemoteI3CRXEvents are defined separately.
   Can these just be normal messages with an opcode (and no payload)?

I've yet to implement IBIs though, that's next on my list. Happy to chat
separately if this gets off-topic for the qemu general discussion.

Overall though, this is great work! Thanks for the contributions.

Cheers,


Jeremy


  reply	other threads:[~2023-04-05  2:45 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-31  1:01 [PATCH 00/16] i3c: aspeed: Add I3C support Joe Komlodi
2023-03-31  1:01 ` [PATCH 01/16] hw/misc/aspeed_i3c: Move to i3c directory Joe Komlodi
2023-03-31  1:01 ` [PATCH 02/16] hw/i3c: Add bus support Joe Komlodi
2023-03-31  1:01 ` [PATCH 03/16] hw/i3c/aspeed_i3c: Add more register fields Joe Komlodi
2023-03-31  1:01 ` [PATCH 04/16] hw/i3c/aspeed_i3c: Add more reset values Joe Komlodi
2023-03-31  1:01 ` [PATCH 05/16] hw/i3c/aspeed_i3c: Add register RO field masks Joe Komlodi
2023-03-31  1:01 ` [PATCH 06/16] hw/i3c/aspeed_i3c: Treat more registers as read-as-zero Joe Komlodi
2023-03-31  1:01 ` [PATCH 07/16] hw/i3c/aspeed_i3c: Use 32 bits on MMIO writes Joe Komlodi
2023-03-31  1:01 ` [PATCH 08/16] hw/i3c/aspeed_i3c: Add IRQ MMIO behavior Joe Komlodi
2023-03-31  1:01 ` [PATCH 09/16] hw/i3c/aspeed_i3c: Add data TX and RX Joe Komlodi
2023-04-03  8:45   ` Jeremy Kerr
2023-03-31  1:01 ` [PATCH 10/16] hw/i3c/aspeed_i3c: Add IBI handling Joe Komlodi
2023-04-03  3:08   ` Jeremy Kerr
2023-04-11  9:16   ` Jeremy Kerr
2023-04-12 23:13     ` Joe Komlodi
2023-03-31  1:01 ` [PATCH 11/16] hw/i3c/aspeed_i3c: Add ctrl MMIO handling Joe Komlodi
2023-03-31  1:01 ` [PATCH 12/16] hw/i3c/aspeed_i3c: Add controller resets Joe Komlodi
2023-03-31  1:01 ` [PATCH 13/16] hw/i3c: Add Mock target Joe Komlodi
2023-03-31  1:01 ` [PATCH 14/16] hw/i3c: remote_i3c: Add model Joe Komlodi
2023-04-03  6:13   ` Jeremy Kerr
2023-04-05  2:04     ` Joe Komlodi
2023-04-05  2:44       ` Jeremy Kerr [this message]
2023-03-31  1:01 ` [PATCH 15/16] qtest: remote_i3c: Add remote I3C qtest Joe Komlodi
2023-03-31  1:01 ` [PATCH 16/16] hw/i3c: Add hotplug support Joe Komlodi
2023-04-01 17:28 ` [PATCH 00/16] i3c: aspeed: Add I3C support Ben Dooks
2023-04-02  7:33   ` Cédric Le Goater
2023-04-02  8:11     ` Jeremy Kerr
2023-04-05  1:55       ` Joe Komlodi
2023-04-05  2:06         ` Jeremy Kerr
2023-04-05  2:30           ` Joel Stanley

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