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From: Richard Henderson <richard.henderson@linaro.org>
To: Daniel Henrique Barboza <dbarboza@ventanamicro.com>,
	qemu-devel@nongnu.org
Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com,
	bmeng@tinylab.org, liweiwei@iscas.ac.cn,
	zhiwei_liu@linux.alibaba.com,
	Christoph Muellner <cmuellner@linux.com>,
	Philipp Tomsich <philipp.tomsich@vrull.eu>
Subject: Re: [PATCH v6 3/4] target/riscv: implement Zicbom extension
Date: Fri, 17 Feb 2023 17:46:20 -1000	[thread overview]
Message-ID: <dc7706fb-6b7c-7b08-9197-1a1a0f973143@linaro.org> (raw)
In-Reply-To: <20230217203445.51077-4-dbarboza@ventanamicro.com>

On 2/17/23 10:34, Daniel Henrique Barboza wrote:
> +    /*
> +     * Section 2.5.2 of cmobase v1.0.1:
> +     *
> +     * "A cache-block management instruction is permitted to
> +     * access the specified cache block whenever a load instruction
> +     * or store instruction is permitted to access the corresponding
> +     * physical addresses. If neither a load instruction nor store
> +     * instruction is permitted to access the physical addresses,
> +     * but an instruction fetch is permitted to access the physical
> +     * addresses, whether a cache-block management instruction is
> +     * permitted to access the cache block is UNSPECIFIED.
> +     *
> +     * This means we have to make a choice of whether checking
> +     * MMU_INST_FETCH is worth it or not. We'll go the easier
> +     * route and check MMU_DATA_LOAD and MMU_DATA_STORE only.
> +     */
> +    ret = probe_access_range_flags(env, address, cbomlen,
> +                                   MMU_DATA_LOAD,
> +                                   mmu_idx, true, &phost, ra);
> +
> +    if (ret == TLB_INVALID_MASK) {
> +        probe_access_range_flags(env, address, cbomlen,
> +                                 MMU_DATA_STORE,
> +                                 mmu_idx, true, &phost, ra);
> +    }

Not correct, at minimum for discarding the result of the second call.  But I suggested a 
different ordering of operations which avoid a third probe.


r~


  reply	other threads:[~2023-02-18  3:47 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-02-17 20:34 [PATCH v6 0/4] riscv: Add support for Zicbo[m,z,p] instructions Daniel Henrique Barboza
2023-02-17 20:34 ` [PATCH v6 1/4] accel/tcg: Add probe_access_range_flags interface Daniel Henrique Barboza
2023-02-17 20:34 ` [PATCH v6 2/4] target/riscv: implement Zicboz extension Daniel Henrique Barboza
2023-02-18  3:44   ` Richard Henderson
2023-02-18  9:28     ` Daniel Henrique Barboza
2023-02-18 19:35       ` Richard Henderson
2023-02-22  9:37         ` Daniel Henrique Barboza
2023-02-22 17:59           ` Richard Henderson
2023-02-18 13:20   ` weiwei
2023-02-17 20:34 ` [PATCH v6 3/4] target/riscv: implement Zicbom extension Daniel Henrique Barboza
2023-02-18  3:46   ` Richard Henderson [this message]
2023-02-17 20:34 ` [PATCH v6 4/4] target/riscv: add Zicbop cbo.prefetch{i, r, m} placeholder Daniel Henrique Barboza

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