From: Richard Henderson <richard.henderson@linaro.org>
To: Michael Clark <mjc@sifive.com>, qemu-devel@nongnu.org
Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>,
Palmer Dabbelt <palmer@sifive.com>,
Sagar Karandikar <sagark@eecs.berkeley.edu>,
RISC-V Patches <patches@groups.riscv.org>,
Peter Maydell <peter.maydell@linaro.org>
Subject: Re: [Qemu-devel] [PATCH v6 00/23] RISC-V QEMU Port Submission
Date: Fri, 23 Feb 2018 13:31:09 -0800 [thread overview]
Message-ID: <dc9974bc-0428-1a20-52c1-0aa46c7eebf9@linaro.org> (raw)
In-Reply-To: <1519344729-73482-1-git-send-email-mjc@sifive.com>
On 02/22/2018 04:11 PM, Michael Clark wrote:
> QEMU RISC-V Emulation Support (RV64GC, RV32GC)
>
> This is hopefully the "fix remaining issues in-tree" release.
FWIW, I'm happy with this.
For those patches that I haven't given an explicit R-b, e.g. most of hw/, I
didn't see anything obviously wrong. So I'll give them
Acked-by: Richard Henderson <richard.henderson@linaro.org>
Unless anyone has any other comments, I would expect the next step would be for
you to create a signed pull request for Peter.
r~
next prev parent reply other threads:[~2018-02-23 21:31 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-02-23 0:11 [Qemu-devel] [PATCH v6 00/23] RISC-V QEMU Port Submission Michael Clark
2018-02-23 0:11 ` [Qemu-devel] [PATCH v6 01/23] RISC-V Maintainers Michael Clark
2018-02-23 0:11 ` [Qemu-devel] [PATCH v6 02/23] RISC-V ELF Machine Definition Michael Clark
2018-02-23 0:11 ` [Qemu-devel] [PATCH v6 03/23] RISC-V CPU Core Definition Michael Clark
2018-02-26 15:52 ` Igor Mammedov
2018-02-23 0:11 ` [Qemu-devel] [PATCH v6 04/23] RISC-V Disassembler Michael Clark
2018-02-23 0:11 ` [Qemu-devel] [PATCH v6 05/23] RISC-V CPU Helpers Michael Clark
2018-02-23 0:11 ` [Qemu-devel] [PATCH v6 06/23] RISC-V FPU Support Michael Clark
2018-02-23 0:11 ` [Qemu-devel] [PATCH v6 07/23] RISC-V GDB Stub Michael Clark
2018-02-23 0:11 ` [Qemu-devel] [PATCH v6 08/23] RISC-V TCG Code Generation Michael Clark
2018-02-23 0:11 ` [Qemu-devel] [PATCH v6 09/23] RISC-V Physical Memory Protection Michael Clark
2018-02-23 0:11 ` [Qemu-devel] [PATCH v6 10/23] RISC-V Linux User Emulation Michael Clark
2018-02-23 0:11 ` [Qemu-devel] [PATCH v6 11/23] Add symbol table callback function interface to load_elf Michael Clark
2018-02-23 21:19 ` Richard Henderson
2018-02-23 0:11 ` [Qemu-devel] [PATCH v6 12/23] RISC-V HTIF Console Michael Clark
2018-02-23 21:24 ` Richard Henderson
2018-02-23 0:11 ` [Qemu-devel] [PATCH v6 13/23] RISC-V HART Array Michael Clark
2018-02-23 0:12 ` [Qemu-devel] [PATCH v6 14/23] SiFive RISC-V CLINT Block Michael Clark
2018-02-23 0:12 ` [Qemu-devel] [PATCH v6 15/23] SiFive RISC-V PLIC Block Michael Clark
2018-02-23 0:12 ` [Qemu-devel] [PATCH v6 16/23] RISC-V Spike Machines Michael Clark
2018-02-23 0:12 ` [Qemu-devel] [PATCH v6 17/23] RISC-V VirtIO Machine Michael Clark
2018-02-23 0:12 ` [Qemu-devel] [PATCH v6 18/23] SiFive RISC-V UART Device Michael Clark
2018-02-23 0:12 ` [Qemu-devel] [PATCH v6 19/23] SiFive RISC-V PRCI Block Michael Clark
2018-02-23 0:12 ` [Qemu-devel] [PATCH v6 20/23] SiFive RISC-V Test Finisher Michael Clark
2018-02-23 0:12 ` [Qemu-devel] [PATCH v6 21/23] SiFive Freedom E300 RISC-V Machine Michael Clark
2018-02-23 0:12 ` [Qemu-devel] [PATCH v6 22/23] SiFive Freedom U500 " Michael Clark
2018-02-23 0:12 ` [Qemu-devel] [PATCH v6 23/23] RISC-V Build Infrastructure Michael Clark
2018-02-23 0:39 ` [Qemu-devel] [PATCH v6 00/23] RISC-V QEMU Port Submission no-reply
2018-02-23 10:10 ` Daniel P. Berrangé
2018-02-23 20:05 ` Michael Clark
2018-02-26 10:47 ` Daniel P. Berrangé
2018-02-26 11:57 ` Peter Maydell
2018-02-26 12:03 ` Daniel P. Berrangé
2018-02-26 12:32 ` Peter Maydell
2018-02-26 13:03 ` Laurent Desnogues
2018-02-23 21:31 ` Richard Henderson [this message]
2018-02-23 22:24 ` Michael Clark
2018-02-24 16:18 ` no-reply
2018-02-26 11:30 ` Richard W.M. Jones
2018-02-26 11:56 ` Andreas Schwab
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