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([2a01:e0a:f0e:9070:527b:9dff:feef:3874]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-429952b7a7csm14804853f8f.8.2025.10.27.07.57.27 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 27 Oct 2025 07:57:28 -0700 (PDT) Message-ID: Date: Mon, 27 Oct 2025 15:57:27 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 23/27] hw/arm/smmuv3-accel: Add property to specify OAS bits Content-Language: en-US To: Jonathan Cameron , Shameer Kolothum Cc: qemu-arm@nongnu.org, qemu-devel@nongnu.org, peter.maydell@linaro.org, jgg@nvidia.com, nicolinc@nvidia.com, ddutile@redhat.com, berrange@redhat.com, nathanc@nvidia.com, mochs@nvidia.com, smostafa@google.com, wangzhou1@hisilicon.com, jiangkunkun@huawei.com, zhangfei.gao@linaro.org, zhenzhong.duan@intel.com, yi.l.liu@intel.com, shameerkolothum@gmail.com References: <20250929133643.38961-1-skolothumtho@nvidia.com> <20250929133643.38961-24-skolothumtho@nvidia.com> <20251001144653.0000456b@huawei.com> From: Eric Auger In-Reply-To: <20251001144653.0000456b@huawei.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=170.10.129.124; envelope-from=eric.auger@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: eric.auger@redhat.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 10/1/25 3:46 PM, Jonathan Cameron wrote: > On Mon, 29 Sep 2025 14:36:39 +0100 > Shameer Kolothum wrote: > >> QEMU SMMUv3 currently sets the output address size (OAS) to 44 bits. With >> accelerator mode enabled, a guest device may use SVA where CPU page tables >> are shared with SMMUv3, requiring OAS at least equal to the CPU OAS. Add >> a user option to set this. >> >> Note: Linux kernel docs currently state the OAS field in the IDR register >> is not meaningful for users. But looks like we need this information. > So is there a kernel documentation fix pending? :) > > Mind you I think we should ensure this is true anyway in QEMU as some other > OS might do weird things if it's not. > > Maybe we should just raise the default QEMU uses (with compat stuff for older > qemu) and not worry about an exposed control for this? I tend to agree with Jonathan. We may assess the effort to increase OAS value in general. Eric >> Signed-off-by: Shameer Kolothum >> --- >> hw/arm/smmuv3-accel.c | 15 +++++++++++++++ >> hw/arm/smmuv3-internal.h | 3 ++- >> hw/arm/smmuv3.c | 15 ++++++++++++++- >> include/hw/arm/smmuv3.h | 1 + >> 4 files changed, 32 insertions(+), 2 deletions(-) >> >> diff --git a/hw/arm/smmuv3-accel.c b/hw/arm/smmuv3-accel.c >> index eee54316bf..ba37d690ad 100644 >> --- a/hw/arm/smmuv3-accel.c >> +++ b/hw/arm/smmuv3-accel.c >> @@ -86,6 +86,17 @@ smmuv3_accel_check_hw_compatible(SMMUv3State *s, >> return false; >> } >> >> + /* >> + * ToDo: OAS is not something Linux kernel doc says meaningful for user. >> + * But looks like OAS needs to be compatibe for accelerator support. Please > spell check this too.. > >> + * check. >> + */ >