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Tue, 27 Jun 2023 08:14:02 -0700 (PDT) Message-ID: Date: Tue, 27 Jun 2023 17:13:58 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:102.0) Gecko/20100101 Thunderbird/102.12.0 Subject: Re: [PATCH v3 00/16] accel: Share CPUState accel context (HAX/NVMM/WHPX/HVF) Content-Language: en-US To: qemu-devel@nongnu.org Cc: kvm@vger.kernel.org, Marcel Apfelbaum , Peter Maydell , Roman Bolshakov , qemu-arm@nongnu.org, Richard Henderson , Alexander Graf , xen-devel@lists.xenproject.org, Sunil Muthuswamy , Anthony Perard , Stefano Stabellini , Yanan Wang , Paul Durrant , Reinoud Zandijk , Eduardo Habkost , Cameron Esfahani , Paolo Bonzini References: <20230624174121.11508-1-philmd@linaro.org> From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= In-Reply-To: <20230624174121.11508-1-philmd@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::62c; envelope-from=philmd@linaro.org; helo=mail-ej1-x62c.google.com X-Spam_score_int: -21 X-Spam_score: -2.2 X-Spam_bar: -- X-Spam_report: (-2.2 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.103, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 24/6/23 19:41, Philippe Mathieu-Daudé wrote: > This series is part of the single binary effort. > > All accelerator will share their per-vCPU context in > an opaque 'accel' pointer within the CPUState. > > First handle HAX/NVMM/WHPX/HVF. KVM and TCG will follow > as two different (bigger) follow-up series. > > Except HVF/intel, all has been (cross-)build tested. > > I plan to send the PR myself. > > Since v2: > - Addressed rth's review comments > - Added rth's R-b tag > > Since v1: > - Addressed rth's review comments > - Added rth's R-b tag > - Converted HVF intel (untested) > - Rebased > > Philippe Mathieu-Daudé (16): > MAINTAINERS: Update Roman Bolshakov email address > accel: Document generic accelerator headers > accel: Remove unused hThread variable on TCG/WHPX > accel: Fix a leak on Windows HAX > accel: Destroy HAX vCPU threads once done > accel: Rename 'hax_vcpu' as 'accel' in CPUState > accel: Rename HAX 'struct hax_vcpu_state' -> AccelCPUState > accel: Move HAX hThread to accelerator context > accel: Remove NVMM unreachable error path > accel: Rename NVMM 'struct qemu_vcpu' -> AccelCPUState > accel: Inline NVMM get_qemu_vcpu() > accel: Remove WHPX unreachable error path > accel: Rename WHPX 'struct whpx_vcpu' -> AccelCPUState > accel: Inline WHPX get_whpx_vcpu() > accel: Rename 'cpu_state' -> 'cs' > accel: Rename HVF 'struct hvf_vcpu_state' -> AccelCPUState Except the MAINTAINERS patch, all the rest is reviewed, so I plan to send a PR tomorrow (dropping the first patch, nobody complained about Roman email bouncing for months so we can keep ignoring the automated emails).