From: Gavin Shan <gshan@redhat.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: drjones@redhat.com, agraf@csgraf.de,
Oliver Upton <oupton@google.com>,
richard.henderson@linaro.org, qemu-devel@nongnu.org,
eric.auger@redhat.com, qemu-arm@nongnu.org, shan.gavin@gmail.com,
pbonzini@redhat.com
Subject: Re: [PATCH 0/5] target/arm: Support variable sized coprocessor registers
Date: Tue, 12 Apr 2022 09:54:17 +0800 [thread overview]
Message-ID: <dd1890cd-8fa3-ec07-1b56-e49cc9039e73@redhat.com> (raw)
In-Reply-To: <CAFEAcA9=eSt+R5OmJUn0KwUrWpnZT6C=O1mq4xUefZJXqyXrUA@mail.gmail.com>
Hi Peter,
On 4/11/22 6:05 PM, Peter Maydell wrote:
> On Mon, 11 Apr 2022 at 10:50, Gavin Shan <gshan@redhat.com> wrote:
>> On 4/11/22 5:22 PM, Peter Maydell wrote:
>>> So, can you give an example of coprocessor registers which are
>>> not 8 bytes in size? How are they accessed by the guest?
>>> If we need to support them then we need to support them, but this
>>> cover letter/series doesn't seem to me to provide enough detail
>>> to make the case that they really are necessary.
>>>
>>> Also, we support SVE today, and we don't have variable size
>>> coprocessor registers. Is there a bug here that we would be
>>> fixing ?
>>>
>>
>> [Cc Oliver Upon]
>>
>> Apart from SVE registers, I don't think we have any more large registers
>> whose sizes exceed 8 bytes for now, until SDEI virtualization needs more
>> large registers for migration.
>>
>> I'm working the KVM series to support SDEI virtualization and last revision
>> is v6. One of the requirement is to migrate the SDEI events and states.
>> In v5, the migration is done by the dedicated ioctl commands and it was
>> suggested by Oliver to use {GET, SET}_ONE_REG. Note that the series isn't
>> merged yet. So I had the prototype to support SDEI's migration through
>> {GET, SET}_ONE_REG. Note that those newly added registers are inaccessible
>> from guest.
>>
>> https://github.com/gwshan/linux/commit/c2e5de5e210de6b003d1e1330eeb0958cf7007f5
>> (branch: kvm/arm64_sdei)
>>
>> https://lore.kernel.org/lkml/20220403153911.12332-13-gshan@redhat.com/T/ (last revision: v6)
>> https://lore.kernel.org/kvmarm/YjtYuk+Jx1dFPQQ9@google.com/ (v5)
>
> Could you please describe what you're trying to do here rather
> than asking me to wade through a big kernel patchset that's
> adding support for a firmware interface I don't know?
>
I'm working on two serieses to support SDEI virtualization and asynchronous
page fault (Async PF) on arm64. When currently running thread is experiencing
stage-2 page fault, Async PF picks another thread for execution. After the
stage-2 page fault is resolved, that thread resumes. Async PF is driven by
notifications sent from host to guest. One of the notifications is delivered
by SDEI event. The SDEI event is something like NMI to some extent. When
the SDEI event is raised by host, it will be delivered to guest and the
previously registered (associated) event handler is invoked in guest.
One of the concerns for SDEI virtualization is how those SDEI events
and states can be migrated. Previously, I had dedicated ioctl commands
to read/write the SDEI events and states. Later, Oliver suggested to
use {GET,SET}_ONE_REG to do migration. I think it's much better than
the dedicated ioctl commands in terms of maintenance cost. In this case,
several 'firmware pseudo registers', like what PSCI is doing, will be
added and some of their sizes will exceed 8 bytes. On the other hand,
the SDEI events and states can be naturally treated as CPU's properties.
It's another reason why pseudo-registers fits the need to migrate
those SDEI events and states.
More information about SDEI can be found from its spec:
https://developer.arm.com/documentation/den0054/latest
>> There are large coprocessor register sizes, like U2048, exposed by KVM.
>> However, it seems we never support those large coprocessor registers.
>> I'm not sure if we have any challenges to support those large registers,
>> or we don't have the needs yet?
>
> The general idea of the coprocessor register accessors for aarch64 KVM
> is that we're giving the VMM access to the same registers that the guest
> accesses via the msr/mrs instructions. Those instructions by definition
> access 64 bit quantities. In a few places we've borrowed this mechanism
> to define KVM-specific pseudo-registers, but that wasn't the primary
> design intent. So maybe it makes sense to extend it to do what you're
> trying to, or maybe that would be the tail wagging the dog. It's hard
> to tell without more detail on what exactly you're trying to expose
> to the VMM here.
>
> (The ONE_REG API is used by more than just aarch64 and more than just
> for coprocessor registers, which is why it supports lots of different
> sizes.)
>
Yes, we're considering 'KVM specific pseudo-registers' for migrating
SDEI events and states. Those pseudo-registers shouldn't be accessed
from guest, meaning they're only accessed by VMM (QEMU). I think
pseudo-registers fits the need very well, to migrate SDEI events
and states.
Thanks,
Gavin
next prev parent reply other threads:[~2022-04-12 1:55 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-11 6:58 [PATCH 0/5] target/arm: Support variable sized coprocessor registers Gavin Shan
2022-04-11 6:58 ` [PATCH 1/5] target/arm/tcg: Indirect addressing for coprocessor register storage Gavin Shan
2022-04-11 6:58 ` [PATCH 2/5] target/arm/hvf: " Gavin Shan
2022-04-11 6:58 ` [PATCH 3/5] target/arm/kvm: " Gavin Shan
2022-04-11 6:58 ` [PATCH 4/5] target/arm: Migrate coprocessor register indirect addressing information Gavin Shan
2022-04-11 6:58 ` [PATCH 5/5] target/arm/kvm: Support coprocessor register with variable size Gavin Shan
2022-04-11 9:22 ` [PATCH 0/5] target/arm: Support variable sized coprocessor registers Peter Maydell
2022-04-11 9:49 ` Gavin Shan
2022-04-11 10:05 ` Peter Maydell
2022-04-12 1:54 ` Gavin Shan [this message]
2022-04-11 12:02 ` Andrew Jones
2022-04-11 12:10 ` Peter Maydell
2022-04-13 2:55 ` Gavin Shan
2022-04-12 2:08 ` Gavin Shan
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