qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Miles Glenn <milesg@linux.ibm.com>
To: "Cédric Le Goater" <clg@redhat.com>,
	"Nicholas Piggin" <npiggin@gmail.com>,
	qemu-ppc@nongnu.org
Cc: qemu-devel@nongnu.org, "Frédéric Barrat" <fbarrat@linux.ibm.com>,
	"Michael Kowal" <kowal@linux.ibm.com>,
	"Caleb Schlossin" <calebs@linux.vnet.ibm.com>
Subject: Re: [PATCH 00/50] ppc/xive: updates for PowerVM
Date: Mon, 04 Aug 2025 12:37:56 -0500	[thread overview]
Message-ID: <dd46b9656f99b23a52f60b8d4150985e5934384d.camel@linux.ibm.com> (raw)
In-Reply-To: <56c95bf5-45bd-43c0-a6ca-62845b2bdca6@redhat.com>

On Sun, 2025-07-20 at 23:26 +0200, Cédric Le Goater wrote:
> On 5/16/25 03:29, Nicholas Piggin wrote:
> > On Fri May 16, 2025 at 1:36 AM AEST, Cédric Le Goater wrote:
> > > On 5/12/25 05:10, Nicholas Piggin wrote:
> > > > These changes gets the powernv xive2 to the point it is able to run
> > > > PowerVM with good stability.
> > > > 
> > > > * Various bug fixes around lost interrupts particularly.
> > > > * Major group interrupt work, in particular around redistributing
> > > >     interrupts. Upstream group support is not in a complete or usable
> > > >     state as it is.
> > > > * Significant context push/pull improvements, particularly pool and
> > > >     phys context handling was quite incomplete beyond trivial OPAL
> > > >     case that pushes at boot.
> > > > * Improved tracing and checking for unimp and guest error situations.
> > > > * Various other missing feature support.
> > > > 
> > > > The ordering and grouping of patches in the series is not perfect,
> > > > because it had been an ongoing development, and PowerVM only started
> > > > to become stable toward the end. I did try to rearrange and improve
> > > > things, but some were not worth rebasing cost (e.g., some of the
> > > > pool/phys pull redistribution patches should have ideally been squashed
> > > > or moved together), so please bear that in mind.  Suggestions for
> > > > further rearranging the series are fine, but I might just find they are
> > > > too much effort to be worthwhile.
> > > > 
> > > > Thanks,
> > > > Nick
> > > > 
> > > > Glenn Miles (12):
> > > >     ppc/xive2: Fix calculation of END queue sizes
> > > >     ppc/xive2: Use fair irq target search algorithm
> > > >     ppc/xive2: Fix irq preempted by lower priority group irq
> > > >     ppc/xive2: Fix treatment of PIPR in CPPR update
> > > >     pnv/xive2: Support ESB Escalation
> > > >     ppc/xive2: add interrupt priority configuration flags
> > > >     ppc/xive2: Support redistribution of group interrupts
> > > >     ppc/xive: Add more interrupt notification tracing
> > > >     ppc/xive2: Improve pool regs variable name
> > > >     ppc/xive2: Implement "Ack OS IRQ to even report line" TIMA op
> > > >     ppc/xive2: Redistribute group interrupt precluded by CPPR update
> > > >     ppc/xive2: redistribute irqs for pool and phys ctx pull
> > > > 
> > > > Michael Kowal (4):
> > > >     ppc/xive2: Remote VSDs need to match on forwarding address
> > > >     ppc/xive2: Reset Generation Flipped bit on END Cache Watch
> > > >     pnv/xive2: Print value in invalid register write logging
> > > >     pnv/xive2: Permit valid writes to VC/PC Flush Control registers
> > > > 
> > > > Nicholas Piggin (34):
> > > >     ppc/xive: Fix xive trace event output
> > > >     ppc/xive: Report access size in XIVE TM operation error logs
> > > >     ppc/xive2: fix context push calculation of IPB priority
> > > >     ppc/xive: Fix PHYS NSR ring matching
> > > >     ppc/xive2: Do not present group interrupt on OS-push if precluded by
> > > >       CPPR
> > > >     ppc/xive2: Set CPPR delivery should account for group priority
> > > >     ppc/xive: tctx_notify should clear the precluded interrupt
> > > >     ppc/xive: Explicitly zero NSR after accepting
> > > >     ppc/xive: Move NSR decoding into helper functions
> > > >     ppc/xive: Fix pulling pool and phys contexts
> > > >     pnv/xive2: VC_ENDC_WATCH_SPEC regs should read back WATCH_FULL
> > > >     ppc/xive: Change presenter .match_nvt to match not present
> > > >     ppc/xive2: Redistribute group interrupt preempted by higher priority
> > > >       interrupt
> > > >     ppc/xive: Add xive_tctx_pipr_present() to present new interrupt
> > > >     ppc/xive: Fix high prio group interrupt being preempted by low prio VP
> > > >     ppc/xive: Split xive recompute from IPB function
> > > >     ppc/xive: tctx signaling registers rework
> > > >     ppc/xive: tctx_accept only lower irq line if an interrupt was
> > > >       presented
> > > >     ppc/xive: Add xive_tctx_pipr_set() helper function
> > > >     ppc/xive2: split tctx presentation processing from set CPPR
> > > >     ppc/xive2: Consolidate presentation processing in context push
> > > >     ppc/xive2: Avoid needless interrupt re-check on CPPR set
> > > >     ppc/xive: Assert group interrupts were redistributed
> > > >     ppc/xive2: implement NVP context save restore for POOL ring
> > > >     ppc/xive2: Prevent pulling of pool context losing phys interrupt
> > > >     ppc/xive: Redistribute phys after pulling of pool context
> > > >     ppc/xive: Check TIMA operations validity
> > > >     ppc/xive2: Implement pool context push TIMA op
> > > >     ppc/xive2: redistribute group interrupts on context push
> > > >     ppc/xive2: Implement set_os_pending TIMA op
> > > >     ppc/xive2: Implement POOL LGS push TIMA op
> > > >     ppc/xive2: Implement PHYS ring VP push TIMA op
> > > >     ppc/xive: Split need_resend into restore_nvp
> > > >     ppc/xive2: Enable lower level contexts on VP push
> > > > 
> > > >    hw/intc/pnv_xive.c          |  16 +-
> > > >    hw/intc/pnv_xive2.c         | 139 +++++--
> > > >    hw/intc/pnv_xive2_regs.h    |   1 +
> > > >    hw/intc/spapr_xive.c        |  18 +-
> > > >    hw/intc/trace-events        |  12 +-
> > > >    hw/intc/xive.c              | 555 ++++++++++++++++++----------
> > > >    hw/intc/xive2.c             | 717 +++++++++++++++++++++++++++---------
> > > >    hw/ppc/pnv.c                |  48 +--
> > > >    hw/ppc/spapr.c              |  21 +-
> > > >    include/hw/ppc/xive.h       |  66 +++-
> > > >    include/hw/ppc/xive2.h      |  22 +-
> > > >    include/hw/ppc/xive2_regs.h |  22 +-
> > > >    12 files changed, 1145 insertions(+), 492 deletions(-)
> > > > 
> > > 
> > > I am impressed :) and glad that you are still taking care of XIVE.
> > > 
> > > I suggest adding new names under the XIVE entry in the MAINTAINERS file.
> > 
> > Yeah it's good to see. They are building a lot more cool stuff with
> > powernv at the moment, hopefully almost all should get upstreamed
> > eventually.
> > 
> > I will try to convince them to add MAINTAINER entries :)
> > 
> > Thanks,
> > Nick
> > 
> 
> This is a major update for XIVE and, since I am not sure anyone
> is going to send a PR for QEMU 10.1, I am volunteering to do
> it again on monday, once and only for these fixes.
> 
> We should clarify in the next cycle who is charge of ppc. IMO,
> If we don't have maintainers, we should orphan all non-pseries
> PPC components. I can send a maintainer update on this as soon
> as the QEMU 10.2 cycle opens.
> 
> 
> Thanks,
> 
> C.
> 

Cédric,

Thanks for doing the PR for these XIVE changes!  It sounds like if we
want to continue having our XIVE changes upstreamed we will need
someone on our IBM QEMU development team to volunteer as a maintainer.
Does becoming a maintainer still require physically attending a key
signing party at KVM Forum?

Thanks,

Glenn



  reply	other threads:[~2025-08-04 19:04 UTC|newest]

Thread overview: 192+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-05-12  3:10 [PATCH 00/50] ppc/xive: updates for PowerVM Nicholas Piggin
2025-05-12  3:10 ` [PATCH 01/50] ppc/xive: Fix xive trace event output Nicholas Piggin
2025-05-14 14:26   ` Caleb Schlossin
2025-05-14 18:41   ` Mike Kowal
2025-05-15 15:30   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 02/50] ppc/xive: Report access size in XIVE TM operation error logs Nicholas Piggin
2025-05-14 14:27   ` Caleb Schlossin
2025-05-14 18:42   ` Mike Kowal
2025-05-15 15:31   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 03/50] ppc/xive2: Fix calculation of END queue sizes Nicholas Piggin
2025-05-14 14:27   ` Caleb Schlossin
2025-05-14 18:45   ` Mike Kowal
2025-05-16  0:06   ` Nicholas Piggin
2025-05-12  3:10 ` [PATCH 04/50] ppc/xive2: Remote VSDs need to match on forwarding address Nicholas Piggin
2025-05-14 14:27   ` Caleb Schlossin
2025-05-14 18:46   ` Mike Kowal
2025-05-15 15:34   ` Miles Glenn
2025-05-16  0:08   ` Nicholas Piggin
2025-05-12  3:10 ` [PATCH 05/50] ppc/xive2: fix context push calculation of IPB priority Nicholas Piggin
2025-05-14 14:30   ` Caleb Schlossin
2025-05-14 18:48   ` Mike Kowal
2025-05-15 15:36   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 06/50] ppc/xive: Fix PHYS NSR ring matching Nicholas Piggin
2025-05-14 14:30   ` Caleb Schlossin
2025-05-14 18:49   ` Mike Kowal
2025-05-15 15:39   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 07/50] ppc/xive2: Reset Generation Flipped bit on END Cache Watch Nicholas Piggin
2025-05-14 14:30   ` Caleb Schlossin
2025-05-14 18:50   ` Mike Kowal
2025-05-15 15:41   ` Miles Glenn
2025-05-16  0:09   ` Nicholas Piggin
2025-05-12  3:10 ` [PATCH 08/50] ppc/xive2: Use fair irq target search algorithm Nicholas Piggin
2025-05-14 14:31   ` Caleb Schlossin
2025-05-14 18:51   ` Mike Kowal
2025-05-15 15:42   ` Miles Glenn
2025-05-16  0:12   ` Nicholas Piggin
2025-05-16 16:22     ` Mike Kowal
2025-05-12  3:10 ` [PATCH 09/50] ppc/xive2: Fix irq preempted by lower priority group irq Nicholas Piggin
2025-05-14 14:31   ` Caleb Schlossin
2025-05-14 18:52   ` Mike Kowal
2025-05-16  0:12   ` Nicholas Piggin
2025-05-12  3:10 ` [PATCH 10/50] ppc/xive2: Fix treatment of PIPR in CPPR update Nicholas Piggin
2025-05-14 14:32   ` Caleb Schlossin
2025-05-14 18:53   ` Mike Kowal
2025-05-16  0:15   ` Nicholas Piggin
2025-05-12  3:10 ` [PATCH 11/50] ppc/xive2: Do not present group interrupt on OS-push if precluded by CPPR Nicholas Piggin
2025-05-14 14:32   ` Caleb Schlossin
2025-05-14 18:54   ` Mike Kowal
2025-05-15 15:43   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 12/50] ppc/xive2: Set CPPR delivery should account for group priority Nicholas Piggin
2025-05-14 14:33   ` Caleb Schlossin
2025-05-14 18:57   ` Mike Kowal
2025-05-15 15:45   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 13/50] ppc/xive: tctx_notify should clear the precluded interrupt Nicholas Piggin
2025-05-14 14:33   ` Caleb Schlossin
2025-05-14 18:58   ` Mike Kowal
2025-05-15 15:46   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 14/50] ppc/xive: Explicitly zero NSR after accepting Nicholas Piggin
2025-05-14 14:34   ` Caleb Schlossin
2025-05-14 19:07   ` Mike Kowal
2025-05-15 23:31     ` Nicholas Piggin
2025-05-15 15:47   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 15/50] ppc/xive: Move NSR decoding into helper functions Nicholas Piggin
2025-05-14 14:35   ` Caleb Schlossin
2025-05-14 19:04   ` Mike Kowal
2025-05-15 15:48   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 16/50] ppc/xive: Fix pulling pool and phys contexts Nicholas Piggin
2025-05-14 14:36   ` Caleb Schlossin
2025-05-14 19:01   ` Mike Kowal
2025-05-15 15:49   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 17/50] pnv/xive2: Support ESB Escalation Nicholas Piggin
2025-05-14 14:36   ` Caleb Schlossin
2025-05-14 19:00   ` Mike Kowal
2025-05-16  0:05   ` Nicholas Piggin
2025-05-16 15:44     ` Miles Glenn
2025-05-12  3:10 ` [PATCH 18/50] pnv/xive2: Print value in invalid register write logging Nicholas Piggin
2025-05-14 14:36   ` Caleb Schlossin
2025-05-14 19:09   ` Mike Kowal
2025-05-15 15:50   ` Miles Glenn
2025-05-16  0:15   ` Nicholas Piggin
2025-05-12  3:10 ` [PATCH 19/50] pnv/xive2: VC_ENDC_WATCH_SPEC regs should read back WATCH_FULL Nicholas Piggin
2025-05-14 14:37   ` Caleb Schlossin
2025-05-14 19:10   ` Mike Kowal
2025-05-15 15:51   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 20/50] pnv/xive2: Permit valid writes to VC/PC Flush Control registers Nicholas Piggin
2025-05-14 14:37   ` Caleb Schlossin
2025-05-14 19:11   ` Mike Kowal
2025-05-15 15:52   ` Miles Glenn
2025-05-16  0:18   ` Nicholas Piggin
2025-05-12  3:10 ` [PATCH 21/50] ppc/xive2: add interrupt priority configuration flags Nicholas Piggin
2025-05-14 19:41   ` Mike Kowal
2025-05-16  0:18   ` Nicholas Piggin
2025-05-12  3:10 ` [PATCH 22/50] ppc/xive2: Support redistribution of group interrupts Nicholas Piggin
2025-05-14 19:42   ` Mike Kowal
2025-05-16  0:19   ` Nicholas Piggin
2025-05-12  3:10 ` [PATCH 23/50] ppc/xive: Add more interrupt notification tracing Nicholas Piggin
2025-05-14 19:46   ` Mike Kowal
2025-05-16  0:19   ` Nicholas Piggin
2025-05-12  3:10 ` [PATCH 24/50] ppc/xive2: Improve pool regs variable name Nicholas Piggin
2025-05-14 19:47   ` Mike Kowal
2025-05-16  0:19   ` Nicholas Piggin
2025-05-12  3:10 ` [PATCH 25/50] ppc/xive2: Implement "Ack OS IRQ to even report line" TIMA op Nicholas Piggin
2025-05-14 19:48   ` Mike Kowal
2025-05-16  0:20   ` Nicholas Piggin
2025-05-12  3:10 ` [PATCH 26/50] ppc/xive2: Redistribute group interrupt precluded by CPPR update Nicholas Piggin
2025-05-14 19:48   ` Mike Kowal
2025-05-16  0:20   ` Nicholas Piggin
2025-05-12  3:10 ` [PATCH 27/50] ppc/xive2: redistribute irqs for pool and phys ctx pull Nicholas Piggin
2025-05-14 19:51   ` Mike Kowal
2025-05-12  3:10 ` [PATCH 28/50] ppc/xive: Change presenter .match_nvt to match not present Nicholas Piggin
2025-05-14 19:54   ` Mike Kowal
2025-05-15 23:40     ` Nicholas Piggin
2025-05-15 15:53   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 29/50] ppc/xive2: Redistribute group interrupt preempted by higher priority interrupt Nicholas Piggin
2025-05-14 19:55   ` Mike Kowal
2025-05-15 15:54   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 30/50] ppc/xive: Add xive_tctx_pipr_present() to present new interrupt Nicholas Piggin
2025-05-14 20:10   ` Mike Kowal
2025-05-15 15:21     ` Mike Kowal
2025-05-15 23:51       ` Nicholas Piggin
2025-05-15 23:43     ` Nicholas Piggin
2025-05-15 15:55   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 31/50] ppc/xive: Fix high prio group interrupt being preempted by low prio VP Nicholas Piggin
2025-05-15 15:21   ` Mike Kowal
2025-05-15 15:55   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 32/50] ppc/xive: Split xive recompute from IPB function Nicholas Piggin
2025-05-14 20:42   ` Mike Kowal
2025-05-15 23:46     ` Nicholas Piggin
2025-05-15 15:56   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 33/50] ppc/xive: tctx signaling registers rework Nicholas Piggin
2025-05-14 20:49   ` Mike Kowal
2025-05-15 15:58   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 34/50] ppc/xive: tctx_accept only lower irq line if an interrupt was presented Nicholas Piggin
2025-05-15 15:16   ` Mike Kowal
2025-05-15 23:50     ` Nicholas Piggin
2025-05-15 16:04   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 35/50] ppc/xive: Add xive_tctx_pipr_set() helper function Nicholas Piggin
2025-05-15 15:18   ` Mike Kowal
2025-05-15 16:05   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 36/50] ppc/xive2: split tctx presentation processing from set CPPR Nicholas Piggin
2025-05-15 15:24   ` Mike Kowal
2025-05-15 16:06   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 37/50] ppc/xive2: Consolidate presentation processing in context push Nicholas Piggin
2025-05-15 15:25   ` Mike Kowal
2025-05-15 16:06   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 38/50] ppc/xive2: Avoid needless interrupt re-check on CPPR set Nicholas Piggin
2025-05-15 15:26   ` Mike Kowal
2025-05-15 16:07   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 39/50] ppc/xive: Assert group interrupts were redistributed Nicholas Piggin
2025-05-15 15:28   ` Mike Kowal
2025-05-15 16:08   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 40/50] ppc/xive2: implement NVP context save restore for POOL ring Nicholas Piggin
2025-05-15 15:36   ` Mike Kowal
2025-05-15 16:09   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 41/50] ppc/xive2: Prevent pulling of pool context losing phys interrupt Nicholas Piggin
2025-05-15 15:43   ` Mike Kowal
2025-05-15 16:10   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 42/50] ppc/xive: Redistribute phys after pulling of pool context Nicholas Piggin
2025-05-15 15:46   ` Mike Kowal
2025-05-15 16:11   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 43/50] ppc/xive: Check TIMA operations validity Nicholas Piggin
2025-05-15 15:47   ` Mike Kowal
2025-05-15 16:12   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 44/50] ppc/xive2: Implement pool context push TIMA op Nicholas Piggin
2025-05-15 15:48   ` Mike Kowal
2025-05-15 16:13   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 45/50] ppc/xive2: redistribute group interrupts on context push Nicholas Piggin
2025-05-15 15:44   ` Mike Kowal
2025-05-15 16:13   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 46/50] ppc/xive2: Implement set_os_pending TIMA op Nicholas Piggin
2025-05-15 15:49   ` Mike Kowal
2025-05-15 16:14   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 47/50] ppc/xive2: Implement POOL LGS push " Nicholas Piggin
2025-05-15 15:50   ` Mike Kowal
2025-05-15 16:15   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 48/50] ppc/xive2: Implement PHYS ring VP " Nicholas Piggin
2025-05-15 15:50   ` Mike Kowal
2025-05-15 16:16   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 49/50] ppc/xive: Split need_resend into restore_nvp Nicholas Piggin
2025-05-15 15:57   ` Mike Kowal
2025-05-15 16:16   ` Miles Glenn
2025-05-12  3:10 ` [PATCH 50/50] ppc/xive2: Enable lower level contexts on VP push Nicholas Piggin
2025-05-15 15:54   ` Mike Kowal
2025-05-15 16:17   ` Miles Glenn
2025-05-15 15:36 ` [PATCH 00/50] ppc/xive: updates for PowerVM Cédric Le Goater
2025-05-16  1:29   ` Nicholas Piggin
2025-07-20 21:26     ` Cédric Le Goater
2025-08-04 17:37       ` Miles Glenn [this message]
2025-08-05  5:09         ` Cédric Le Goater
2025-08-05 15:52           ` Miles Glenn
2025-08-05 20:09             ` Cédric Le Goater
2025-07-03  9:37 ` Gautam Menghani

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=dd46b9656f99b23a52f60b8d4150985e5934384d.camel@linux.ibm.com \
    --to=milesg@linux.ibm.com \
    --cc=calebs@linux.vnet.ibm.com \
    --cc=clg@redhat.com \
    --cc=fbarrat@linux.ibm.com \
    --cc=kowal@linux.ibm.com \
    --cc=npiggin@gmail.com \
    --cc=qemu-devel@nongnu.org \
    --cc=qemu-ppc@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).