From: Thomas Huth <thuth@redhat.com>
To: Yoshinori Sato <ysato@users.sourceforge.jp>, qemu-devel@nongnu.org
Cc: "Marc-André Lureau" <marcandre.lureau@redhat.com>,
"Magnus Damm" <magnus.damm@gmail.com>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
"Paolo Bonzini" <pbonzini@redhat.com>
Subject: Re: [PATCH 1/2] hw/char/renesas_sci: Add fifo buffer to backend interface.
Date: Tue, 1 Feb 2022 07:48:58 +0100 [thread overview]
Message-ID: <de031f36-963c-8828-6724-450e9fbf48d6@redhat.com> (raw)
In-Reply-To: <20220131094246.772550-1-ysato@users.sourceforge.jp>
On 31/01/2022 10.42, Yoshinori Sato wrote:
> SCI does not have a fifo, it is necessary to send and receive
> at a bit rate speed.
> But, qemu's chardev backend does not have a buffer,
> so it sends received data continuously.
> By buffering the received data with the FIFO, continuous
> received data can be received.
Hi!
If you describe it like this, it sounds like you're now emulating a buffer
that is not there with real hardware? Is that really what you want here,
i.e. wouldn't this hide problems with the real hardware that are mitigated
in QEMU with this buffer?
Anyway, please use scripts/get_maintainer.pl to get a list of people who
should be put on CC:, otherwise your patches might get lost in the high
traffic of the mailing list.
Thomas
next prev parent reply other threads:[~2022-02-01 7:27 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-31 9:42 [PATCH 1/2] hw/char/renesas_sci: Add fifo buffer to backend interface Yoshinori Sato
2022-01-31 9:42 ` [PATCH 2/2] test/avocado: Update machibe_rx_gdbsim tests Yoshinori Sato
2022-02-01 6:48 ` Thomas Huth [this message]
2022-02-01 15:52 ` [PATCH 1/2] hw/char/renesas_sci: Add fifo buffer to backend interface Yoshinori Sato
2022-02-01 18:54 ` Peter Maydell
2022-02-03 13:38 ` Yoshinori Sato
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