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From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>,
	qemu-arm@nongnu.org, qemu-devel@nongnu.org
Cc: qemu-stable@nongnu.org, Beniamino Galvani <b.galvani@gmail.com>,
	Strahinja Jankovic <strahinja.p.jankovic@gmail.com>
Subject: Re: [PATCH] hw/intc/allwinner-a10-pic: Don't use set_bit()/clear_bit()
Date: Tue, 25 Apr 2023 16:47:58 +0100	[thread overview]
Message-ID: <de9e4f6d-e985-b1f9-5a59-0127c54a7323@linaro.org> (raw)
In-Reply-To: <20230424152833.1334136-1-peter.maydell@linaro.org>

On 24/4/23 17:28, Peter Maydell wrote:
> The Allwinner PIC model uses set_bit() and clear_bit() to update the
> values in its irq_pending[] array when an interrupt arrives.  However
> it is using these functions wrongly: they work on an array of type
> 'long', and it is passing an array of type 'uint32_t'.  Because the
> code manually figures out the right array element, this works on
> little-endian hosts and on 32-bit big-endian hosts, where bits 0..31
> in a 'long' are in the same place as they are in a 'uint32_t'.
> However it breaks on 64-bit big-endian hosts.
> 
> Remove the use of set_bit() and clear_bit() in favour of using
> deposit32() on the array element.  This fixes a bug where on
> big-endian 64-bit hosts the guest kernel would hang early on in
> bootup.
> 
> Cc: qemu-stable@nongnu.org
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
>   hw/intc/allwinner-a10-pic.c | 7 ++-----
>   1 file changed, 2 insertions(+), 5 deletions(-)

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>



  parent reply	other threads:[~2023-04-25 15:48 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-04-24 15:28 [PATCH] hw/intc/allwinner-a10-pic: Don't use set_bit()/clear_bit() Peter Maydell
2023-04-24 16:39 ` Thomas Huth
2023-04-25 15:47 ` Philippe Mathieu-Daudé [this message]
2023-05-02 10:28 ` Peter Maydell

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