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Wed, 28 Aug 2024 16:35:29 -0700 (PDT) Message-ID: Date: Thu, 29 Aug 2024 09:35:15 +1000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 15/15] tcg/riscv: Enable vector TCG host-native To: LIU Zhiwei , qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, palmer@dabbelt.com, alistair.francis@wdc.com, dbarboza@ventanamicro.com, liwei1518@gmail.com, bmeng.cn@gmail.com, TANG Tiancheng References: <20240813113436.831-1-zhiwei_liu@linux.alibaba.com> <20240813113436.831-16-zhiwei_liu@linux.alibaba.com> <7eabd980-ec6c-4748-8ada-f9d6228ee2ef@linaro.org> <8883511a-fa31-4703-9302-5a7d511d2067@linux.alibaba.com> Content-Language: en-US From: Richard Henderson In-Reply-To: <8883511a-fa31-4703-9302-5a7d511d2067@linux.alibaba.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::1135; envelope-from=richard.henderson@linaro.org; helo=mail-yw1-x1135.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 8/27/24 18:31, LIU Zhiwei wrote: > We will use this one. But probe the vlen in util/cpuinfo-riscv.c has no meaning as we > sometimes use the compiler settings or hw_probe API. In these cases, the vlen detected in > util/cpuinfo-riscv.c is zero. Pardon? While you might check __riscv_zve64x at compile-time, you would still fall through to --- } + if (info & CPUINFO_ZVE64X) { + unsigned long vl; + asm("vsetvli %0, r0, e64" : "=r"(vl)); + if (vl) { + riscv_vlen = vl * 8; + } else { + info &= ~CPUINFO_ZVE64X; + } + } + info |= CPUINFO_ALWAYS; cpuinfo = info; --- Do not attempt to merge the vsetvli from the SIGILL probe; I expect that path to become unused and eventually vanish. r~