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[90.13.240.27]) by smtp.gmail.com with ESMTPSA id c7sm20748022wrq.81.2021.12.28.02.35.32 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 28 Dec 2021 02:35:33 -0800 (PST) Message-ID: Date: Tue, 28 Dec 2021 11:35:31 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.4.0 Subject: Re: [PATCH 2/2] hw/dma: sifive_pdma: permit 4/8-byte access size of PDMA registers To: Jim Shu , Alistair.Francis@wdc.com, bin.meng@windriver.com, palmer@dabbelt.com, frank.chang@sifive.com, qemu-riscv@nongnu.org, qemu-devel@nongnu.org References: <20211228005236.415583-1-jim.shu@sifive.com> <20211228005236.415583-3-jim.shu@sifive.com> From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= In-Reply-To: <20211228005236.415583-3-jim.shu@sifive.com> Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Language: en-US Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=170.10.133.124; envelope-from=philmd@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -63 X-Spam_score: -6.4 X-Spam_bar: ------ X-Spam_report: (-6.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.573, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-3.024, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 12/28/21 01:52, Jim Shu wrote: > It's obvious that PDMA support 64-bit access of 64-bit registers, and > in previous commit, we confirm that PDMA support 32-bit access of both > 32/64-bit registers. Thus, we configure 32/64-bit memory access of > PDMA registers as valid in general. > > Signed-off-by: Jim Shu > Reviewed-by: Frank Chang > --- > hw/dma/sifive_pdma.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/hw/dma/sifive_pdma.c b/hw/dma/sifive_pdma.c > index b8b198ab4e..731fcdcf89 100644 > --- a/hw/dma/sifive_pdma.c > +++ b/hw/dma/sifive_pdma.c > @@ -441,6 +441,10 @@ static const MemoryRegionOps sifive_pdma_ops = { > .impl = { > .min_access_size = 4, > .max_access_size = 8, > + }, > + .valid = { > + .min_access_size = 4, > + .max_access_size = 8, > } > }; > Eh now I see this patch. It is correct, so: Reviewed-by: Philippe Mathieu-Daudé But I think the previous patch could be simpler.