From: Richard Henderson <richard.henderson@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: QEMU Developers <qemu-devel@nongnu.org>
Subject: Re: [PATCH v2 02/15] tcg/arm: Add host vector framework
Date: Mon, 8 Feb 2021 14:26:15 -0800 [thread overview]
Message-ID: <e006b705-981b-8978-37fa-d519faaf26c1@linaro.org> (raw)
In-Reply-To: <CAFEAcA_iQnEFPxkNfUDm5fYTp+bKQ3-UM2nDjMod5SwUu6X=Sg@mail.gmail.com>
On 2/8/21 11:30 AM, Peter Maydell wrote:
> On Mon, 8 Feb 2021 at 18:58, Richard Henderson
> <richard.henderson@linaro.org> wrote:
>>
>> On 2/8/21 10:28 AM, Peter Maydell wrote:
>>> On Mon, 8 Feb 2021 at 17:53, Peter Maydell <peter.maydell@linaro.org> wrote:
>>>> The AAPCS says that q4-q7 are preserved across calls.
>>>
>>> Speaking of which, doesn't that mean we also need to
>>> save and restore q4-q7 in tcg_target_qemu_prologue()
>>> if we might be generating neon insns? (It doesn't look like
>>> aarch64's prologue does this, which seems like a bug.)
>>
>> I just put them on the reserved list so that they don't get used.
>>
>>> tcg_regset_reset_reg(tcg_target_call_clobber_regs, TCG_REG_V8);
>> ...
>>> tcg_regset_reset_reg(tcg_target_call_clobber_regs, TCG_REG_V15);
>
> I'm confused. That's not the reserved list, it's the call-clobber
> list
Oops. It's actually done by not adding them to tcg_target_reg_alloc_order.
/* V8 - V15 are call-saved, and skipped. */
Which works as well, I suppose. I dunno which makes more sense.
r~
next prev parent reply other threads:[~2021-02-09 0:04 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-08 2:46 [PATCH v2 00/15] tcg/arm: host neon support Richard Henderson
2021-02-08 2:46 ` [PATCH v2 01/15] tcg: Change parameters for tcg_target_const_match Richard Henderson
2021-02-08 17:43 ` Peter Maydell
2021-02-08 2:46 ` [PATCH v2 02/15] tcg/arm: Add host vector framework Richard Henderson
2021-02-08 17:53 ` Peter Maydell
2021-02-08 18:28 ` Peter Maydell
2021-02-08 18:58 ` Richard Henderson
2021-02-08 19:30 ` Peter Maydell
2021-02-08 22:26 ` Richard Henderson [this message]
2021-02-08 2:46 ` [PATCH v2 03/15] tcg/arm: Implement tcg_out_ld/st for vector types Richard Henderson
2021-02-08 17:56 ` Peter Maydell
2021-02-08 2:46 ` [PATCH v2 04/15] tcg/arm: Implement tcg_out_mov " Richard Henderson
2021-02-08 18:02 ` Peter Maydell
2021-02-08 2:46 ` [PATCH v2 05/15] tcg/arm: Implement tcg_out_dup*_vec Richard Henderson
2021-02-08 18:14 ` Peter Maydell
2021-02-08 2:46 ` [PATCH v2 06/15] tcg/arm: Implement minimal vector operations Richard Henderson
2021-02-08 18:20 ` Peter Maydell
2021-02-08 2:46 ` [PATCH v2 07/15] tcg/arm: Implement andc, orc, abs, neg, not " Richard Henderson
2021-02-08 18:22 ` Peter Maydell
2021-02-08 2:46 ` [PATCH v2 08/15] tcg/arm: Implement TCG_TARGET_HAS_shi_vec Richard Henderson
2021-02-08 19:35 ` Peter Maydell
2021-02-08 2:46 ` [PATCH v2 09/15] tcg/arm: Implement TCG_TARGET_HAS_mul_vec Richard Henderson
2021-02-08 19:36 ` Peter Maydell
2021-02-08 2:46 ` [PATCH v2 10/15] tcg/arm: Implement TCG_TARGET_HAS_sat_vec Richard Henderson
2021-02-08 19:36 ` Peter Maydell
2021-02-08 2:46 ` [PATCH v2 11/15] tcg/arm: Implement TCG_TARGET_HAS_minmax_vec Richard Henderson
2021-02-08 19:38 ` Peter Maydell
2021-02-08 2:46 ` [PATCH v2 12/15] tcg/arm: Implement TCG_TARGET_HAS_bitsel_vec Richard Henderson
2021-02-08 19:55 ` Peter Maydell
2021-02-08 22:27 ` Richard Henderson
2021-02-08 2:46 ` [PATCH v2 13/15] tcg/arm: Implement TCG_TARGET_HAS_shv_vec Richard Henderson
2021-02-08 20:50 ` Peter Maydell
2021-02-08 22:27 ` Richard Henderson
2021-02-08 2:46 ` [PATCH v2 14/15] tcg/arm: Implement TCG_TARGET_HAS_roti_vec Richard Henderson
2021-02-08 20:51 ` Peter Maydell
2021-02-08 2:46 ` [PATCH v2 15/15] tcg/arm: Implement TCG_TARGET_HAS_rotv_vec Richard Henderson
2021-02-08 20:52 ` Peter Maydell
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