From: Richard Henderson <richard.henderson@linaro.org>
To: "Philippe Mathieu-Daudé" <philmd@linaro.org>, qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org, Peter Maydell <peter.maydell@linaro.org>
Subject: Re: [PATCH 6/9] target/arm: Restrict CPUARMState::nvic to sysemu and store as NVICState*
Date: Mon, 6 Feb 2023 09:17:02 -1000 [thread overview]
Message-ID: <e01a966f-b8b6-177c-6f92-6accfce2f27f@linaro.org> (raw)
In-Reply-To: <55a05bd4-5dd9-6880-2d61-22c31298d1bf@linaro.org>
On 2/6/23 09:00, Philippe Mathieu-Daudé wrote:
> On 6/2/23 19:57, Richard Henderson wrote:
>> On 2/6/23 02:17, Philippe Mathieu-Daudé wrote:
>>> There is no point in using a void pointer to access the NVIC.
>>> Use the real type to avoid casting it while debugging.
>>>
>>> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
>>> ---
>>
>> This is doing several things at once. The nvic interface change needn't be done
>> simultaneously.
>
> You mean this change?
>
> -typedef struct NVICState NVICState;
> -DECLARE_INSTANCE_CHECKER(NVICState, NVIC,
> - TYPE_NVIC)
> +OBJECT_DECLARE_SIMPLE_TYPE(NVICState, NVIC)
>
> This is a No-OP, converting from the older DECLARE_INSTANCE_CHECKER
> style to the newer OBJECT_DECLARE_SIMPLE_TYPE. But OK, unrelated, I'll
> remove it from the patch.
That and the movement of cpu->nvic into the ifdef.
r~
next prev parent reply other threads:[~2023-02-06 19:18 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-06 12:17 [PATCH 0/9] target/arm: Housekeeping around NVIC Philippe Mathieu-Daudé
2023-02-06 12:17 ` [PATCH 1/9] target/arm: Restrict v7-M MMU helpers to sysemu TCG Philippe Mathieu-Daudé
2023-02-06 18:48 ` Richard Henderson
2023-02-06 12:17 ` [PATCH 2/9] target/arm: Constify ID_PFR1 on user emulation Philippe Mathieu-Daudé
2023-02-06 18:38 ` Richard Henderson
2023-02-06 12:17 ` [PATCH 3/9] target/arm: Avoid resetting CPUARMState::eabi field Philippe Mathieu-Daudé
2023-02-06 18:37 ` Richard Henderson
2023-02-06 12:17 ` [PATCH 4/9] target/arm: Restrict CPUARMState::arm_boot_info to sysemu Philippe Mathieu-Daudé
2023-02-06 18:52 ` Richard Henderson
2023-02-06 12:17 ` [PATCH 5/9] target/arm: Restrict CPUARMState::gicv3state " Philippe Mathieu-Daudé
2023-02-06 18:53 ` Richard Henderson
2023-02-06 12:17 ` [PATCH 6/9] target/arm: Restrict CPUARMState::nvic to sysemu and store as NVICState* Philippe Mathieu-Daudé
2023-02-06 18:57 ` Richard Henderson
2023-02-06 19:00 ` Philippe Mathieu-Daudé
2023-02-06 19:17 ` Richard Henderson [this message]
2023-02-06 12:17 ` [PATCH 7/9] target/arm: Declare CPU <-> NVIC helpers in 'hw/intc/armv7m_nvic.h' Philippe Mathieu-Daudé
2023-02-06 18:59 ` Richard Henderson
2023-02-06 12:17 ` [PATCH 8/9] hw/intc/armv7m_nvic: Allow calling neg_prio_requested on unrealized NVIC Philippe Mathieu-Daudé
2023-02-06 12:17 ` [PATCH 9/9] hw/arm/armv7m: Pass CPU/NVIC using object_property_add_const_link() Philippe Mathieu-Daudé
2023-02-06 14:35 ` Philippe Mathieu-Daudé
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