Re: [Qemu-devel] [PATCH v3 08/15] s390x/tcg: Handle SET FPC AND LOAD FPC 3-bit BFP rounding modes

[David Hildenbrand <david@redhat.com>]

On 18.02.19 13:27, David Hildenbrand wrote:
> We already forward the 3 bits correctly in the translation functions. We
> also have to handle them properly and check for specification
> exceptions.
> 
> Setting an invalid rounding mode (BFP only, all DFP rounding modes)
> results in a specification exception. Setting unassigned bits in the
> fpc, results in a specification exception.
> 
> This fixes LOAD FPC (AND SIGNAL), SET FPC (AND SIGNAL). Also for,
> SET BFP ROUNDING MODE, 3-bit rounding mode is now explicitly checked.
> 
> Note: TCG_CALL_NO_WG is required for sfpc handler, as we now inject
> exceptions.
> 
> We won't be modeling abscence of the "floating-point extension facility"
> for now, not necessary as most take the facility for granted without
> checking.
> 
> z14 PoP, 9-23, "LOAD FPC"
>     When the floating-point extension facility is
>     installed, bits 29-31 of the second operand must
>     specify a valid BFP rounding mode and bits 6-7,
>     14-15, 24, and 28 must be zero; otherwise, a
>     specification exception is recognized.
> 
> Signed-off-by: David Hildenbrand <david@redhat.com>


Here as well,

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


-- 

Thanks,

David / dhildenb