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References: <20190218122710.23639-1-david@redhat.com>
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From: David Hildenbrand <david@redhat.com>
Message-ID: <e07aa75c-f71d-926e-012c-9582a67ba948@redhat.com>
Date: Tue, 26 Feb 2019 15:54:21 +0100
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Subject: Re: [Qemu-devel] [PATCH v3 08/15] s390x/tcg: Handle SET FPC AND
 LOAD FPC 3-bit BFP rounding modes
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To: qemu-devel@nongnu.org
Cc: qemu-s390x@nongnu.org, Thomas Huth <thuth@redhat.com>, Halil Pasic <pasic@linux.ibm.com>, Christian Borntraeger <borntraeger@de.ibm.com>, Janosch Frank <frankja@linux.ibm.com>, Cornelia Huck <cohuck@redhat.com>, Richard Henderson <rth@twiddle.net>

On 18.02.19 13:27, David Hildenbrand wrote:
> We already forward the 3 bits correctly in the translation functions. We
> also have to handle them properly and check for specification
> exceptions.
> 
> Setting an invalid rounding mode (BFP only, all DFP rounding modes)
> results in a specification exception. Setting unassigned bits in the
> fpc, results in a specification exception.
> 
> This fixes LOAD FPC (AND SIGNAL), SET FPC (AND SIGNAL). Also for,
> SET BFP ROUNDING MODE, 3-bit rounding mode is now explicitly checked.
> 
> Note: TCG_CALL_NO_WG is required for sfpc handler, as we now inject
> exceptions.
> 
> We won't be modeling abscence of the "floating-point extension facility"
> for now, not necessary as most take the facility for granted without
> checking.
> 
> z14 PoP, 9-23, "LOAD FPC"
>     When the floating-point extension facility is
>     installed, bits 29-31 of the second operand must
>     specify a valid BFP rounding mode and bits 6-7,
>     14-15, 24, and 28 must be zero; otherwise, a
>     specification exception is recognized.
> 
> Signed-off-by: David Hildenbrand <david@redhat.com>


Here as well,

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


-- 

Thanks,

David / dhildenb