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[97.113.13.231]) by smtp.gmail.com with ESMTPSA id 201sm13224484pfz.24.2019.06.16.18.14.05 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 16 Jun 2019 18:14:06 -0700 (PDT) To: Mark Cave-Ayland , qemu-devel@nongnu.org, qemu-ppc@nongnu.org, david@gibson.dropbear.id.au, rth@twiddle.net, gkurz@kaod.org References: <20190616123751.781-1-mark.cave-ayland@ilande.co.uk> <20190616123751.781-2-mark.cave-ayland@ilande.co.uk> From: Richard Henderson Openpgp: preference=signencrypt Message-ID: Date: Sun, 16 Jun 2019 18:14:03 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.7.0 MIME-Version: 1.0 In-Reply-To: <20190616123751.781-2-mark.cave-ayland@ilande.co.uk> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::541 Subject: Re: [Qemu-devel] [PATCH v3 01/15] target/ppc: remove getVSR()/putVSR() from fpu_helper.c X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 6/16/19 5:37 AM, Mark Cave-Ayland wrote: > Since commit 8a14d31b00 "target/ppc: switch fpr/vsrl registers so all VSX > registers are in host endian order" functions getVSR() and putVSR() which used > to convert the VSR registers into host endian order are no longer required. > > Signed-off-by: Mark Cave-Ayland > --- > target/ppc/fpu_helper.c | 762 +++++++++++++++++++++++------------------------- > 1 file changed, 366 insertions(+), 396 deletions(-) Reviewed-by: Richard Henderson r~