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Wed, 24 Jan 2024 18:24:02 -0800 (PST) X-Google-Smtp-Source: AGHT+IE7yDTYks5N2vQlDIuHI64nV97t1Jztk0lC/3jyR7ZfI1gxm4ygIUBH5aACm9r1J9fNXkU3UQ== X-Received: by 2002:a05:6871:2318:b0:214:2725:4d7a with SMTP id sf24-20020a056871231800b0021427254d7amr295987oab.37.1706149442776; Wed, 24 Jan 2024 18:24:02 -0800 (PST) Received: from [10.72.112.202] ([43.228.180.230]) by smtp.gmail.com with ESMTPSA id p64-20020a634243000000b005cf6e5feeb4sm12589874pga.38.2024.01.24.18.23.59 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 24 Jan 2024 18:24:02 -0800 (PST) Message-ID: Date: Thu, 25 Jan 2024 12:23:57 +1000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 2/5] hw/arm/aspeed: Set default CPU count using aspeed_soc_num_cpus() Content-Language: en-US To: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= , qemu-devel@nongnu.org Cc: Peter Maydell , qemu-arm@nongnu.org, Joel Stanley , Andrew Jeffery , =?UTF-8?Q?C=C3=A9dric_Le_Goater?= References: <20240123224842.18485-1-philmd@linaro.org> <20240123224842.18485-3-philmd@linaro.org> From: Gavin Shan In-Reply-To: <20240123224842.18485-3-philmd@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=170.10.129.124; envelope-from=gshan@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -35 X-Spam_score: -3.6 X-Spam_bar: --- X-Spam_report: (-3.6 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1.5, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 1/24/24 08:48, Philippe Mathieu-Daudé wrote: > Since commit b7f1a0cb76 ("arm/aspeed: Compute the number > of CPUs from the SoC definition") Aspeed machines use the > aspeed_soc_num_cpus() helper to set the number of CPUs. > > Use it for the ast1030-evb (commit 356b230ed1 "aspeed/soc: > Add AST1030 support") and supermicrox11-bmc (commit 40a38df55e > "hw/arm/aspeed: Add board model for Supermicro X11 BMC") machines. > > Signed-off-by: Philippe Mathieu-Daudé > --- > hw/arm/aspeed.c | 5 ++++- > 1 file changed, 4 insertions(+), 1 deletion(-) > Reviewed-by: Gavin Shan