* [PATCH v2 1/2] ppc/pnv: Set P10 core xscom region size to match hardware
2023-07-06 5:39 [PATCH v2 0/2] ppc/pnv: Set P10 core xscom region size to match hardware Nicholas Piggin
@ 2023-07-06 5:39 ` Nicholas Piggin
2023-07-06 5:39 ` [PATCH v2 2/2] tests/qtest: Add xscom tests for powernv10 machine Nicholas Piggin
` (3 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: Nicholas Piggin @ 2023-07-06 5:39 UTC (permalink / raw)
To: Daniel Henrique Barboza, Joel Stanley, Cédric Le Goater,
Nicholas Piggin, Frédéric Barrat
Cc: qemu-devel, qemu-ppc
The P10 core xscom memory regions overlap because the size is wrong.
The P10 core+L2 xscom region size is allocated as 0x1000 (with some
unused ranges). "EC" is used as a closer match, as "EX" includes L3
which has a disjoint xscom range that would require a different
region if it were implemented.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
hw/ppc/pnv_core.c | 6 ++++--
include/hw/ppc/pnv_core.h | 1 +
include/hw/ppc/pnv_xscom.h | 2 +-
3 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/hw/ppc/pnv_core.c b/hw/ppc/pnv_core.c
index 8a72171ce0..aa363e4b85 100644
--- a/hw/ppc/pnv_core.c
+++ b/hw/ppc/pnv_core.c
@@ -296,9 +296,8 @@ static void pnv_core_realize(DeviceState *dev, Error **errp)
}
snprintf(name, sizeof(name), "xscom-core.%d", cc->core_id);
- /* TODO: check PNV_XSCOM_EX_SIZE for p10 */
pnv_xscom_region_init(&pc->xscom_regs, OBJECT(dev), pcc->xscom_ops,
- pc, name, PNV_XSCOM_EX_SIZE);
+ pc, name, pcc->xscom_size);
qemu_register_reset(pnv_core_reset, pc);
return;
@@ -350,6 +349,7 @@ static void pnv_core_power8_class_init(ObjectClass *oc, void *data)
PnvCoreClass *pcc = PNV_CORE_CLASS(oc);
pcc->xscom_ops = &pnv_core_power8_xscom_ops;
+ pcc->xscom_size = PNV_XSCOM_EX_SIZE;
}
static void pnv_core_power9_class_init(ObjectClass *oc, void *data)
@@ -357,6 +357,7 @@ static void pnv_core_power9_class_init(ObjectClass *oc, void *data)
PnvCoreClass *pcc = PNV_CORE_CLASS(oc);
pcc->xscom_ops = &pnv_core_power9_xscom_ops;
+ pcc->xscom_size = PNV_XSCOM_EX_SIZE;
}
static void pnv_core_power10_class_init(ObjectClass *oc, void *data)
@@ -364,6 +365,7 @@ static void pnv_core_power10_class_init(ObjectClass *oc, void *data)
PnvCoreClass *pcc = PNV_CORE_CLASS(oc);
pcc->xscom_ops = &pnv_core_power10_xscom_ops;
+ pcc->xscom_size = PNV10_XSCOM_EC_SIZE;
}
static void pnv_core_class_init(ObjectClass *oc, void *data)
diff --git a/include/hw/ppc/pnv_core.h b/include/hw/ppc/pnv_core.h
index 77ef00f47a..aa5ca281fc 100644
--- a/include/hw/ppc/pnv_core.h
+++ b/include/hw/ppc/pnv_core.h
@@ -46,6 +46,7 @@ struct PnvCoreClass {
DeviceClass parent_class;
const MemoryRegionOps *xscom_ops;
+ uint64_t xscom_size;
};
#define PNV_CORE_TYPE_SUFFIX "-" TYPE_PNV_CORE
diff --git a/include/hw/ppc/pnv_xscom.h b/include/hw/ppc/pnv_xscom.h
index f7da9a1dc6..a4c9d95dc5 100644
--- a/include/hw/ppc/pnv_xscom.h
+++ b/include/hw/ppc/pnv_xscom.h
@@ -133,7 +133,7 @@ struct PnvXScomInterfaceClass {
#define PNV10_XSCOM_EC_BASE(core) \
((uint64_t) PNV10_XSCOM_EQ_BASE(core) | PNV10_XSCOM_EC(core & 0x3))
-#define PNV10_XSCOM_EC_SIZE 0x100000
+#define PNV10_XSCOM_EC_SIZE 0x1000
#define PNV10_XSCOM_PSIHB_BASE 0x3011D00
#define PNV10_XSCOM_PSIHB_SIZE 0x100
--
2.40.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH v2 2/2] tests/qtest: Add xscom tests for powernv10 machine
2023-07-06 5:39 [PATCH v2 0/2] ppc/pnv: Set P10 core xscom region size to match hardware Nicholas Piggin
2023-07-06 5:39 ` [PATCH v2 1/2] " Nicholas Piggin
@ 2023-07-06 5:39 ` Nicholas Piggin
2023-07-06 6:21 ` [PATCH v2 0/2] ppc/pnv: Set P10 core xscom region size to match hardware Cédric Le Goater
` (2 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: Nicholas Piggin @ 2023-07-06 5:39 UTC (permalink / raw)
To: Daniel Henrique Barboza, Joel Stanley, Cédric Le Goater,
Nicholas Piggin, Frédéric Barrat
Cc: qemu-devel, qemu-ppc
Add basic chip and core xscom tests for powernv10 machine, equivalent
to tests for powernv8 and 9.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
tests/qtest/pnv-xscom-test.c | 44 ++++++++++++++++++++++++++++--------
1 file changed, 35 insertions(+), 9 deletions(-)
diff --git a/tests/qtest/pnv-xscom-test.c b/tests/qtest/pnv-xscom-test.c
index 2c46d5cf6d..80903fa782 100644
--- a/tests/qtest/pnv-xscom-test.c
+++ b/tests/qtest/pnv-xscom-test.c
@@ -15,6 +15,7 @@ typedef enum PnvChipType {
PNV_CHIP_POWER8, /* AKA Venice */
PNV_CHIP_POWER8NVL, /* AKA Naples */
PNV_CHIP_POWER9, /* AKA Nimbus */
+ PNV_CHIP_POWER10,
} PnvChipType;
typedef struct PnvChip {
@@ -46,13 +47,22 @@ static const PnvChip pnv_chips[] = {
.cfam_id = 0x220d104900008000ull,
.first_core = 0x0,
},
+ {
+ .chip_type = PNV_CHIP_POWER10,
+ .cpu_model = "POWER10",
+ .xscom_base = 0x000603fc00000000ull,
+ .cfam_id = 0x120da04900008000ull,
+ .first_core = 0x0,
+ },
};
static uint64_t pnv_xscom_addr(const PnvChip *chip, uint32_t pcba)
{
uint64_t addr = chip->xscom_base;
- if (chip->chip_type == PNV_CHIP_POWER9) {
+ if (chip->chip_type == PNV_CHIP_POWER10) {
+ addr |= ((uint64_t) pcba << 3);
+ } else if (chip->chip_type == PNV_CHIP_POWER9) {
addr |= ((uint64_t) pcba << 3);
} else {
addr |= (((uint64_t) pcba << 4) & ~0xffull) |
@@ -82,6 +92,8 @@ static void test_cfam_id(const void *data)
if (chip->chip_type == PNV_CHIP_POWER9) {
machine = "powernv9";
+ } else if (chip->chip_type == PNV_CHIP_POWER10) {
+ machine = "powernv10";
}
qts = qtest_initf("-M %s -accel tcg -cpu %s",
@@ -96,23 +108,35 @@ static void test_cfam_id(const void *data)
(PNV_XSCOM_EX_CORE_BASE | ((uint64_t)(core) << 24))
#define PNV_XSCOM_P9_EC_BASE(core) \
((uint64_t)(((core) & 0x1F) + 0x20) << 24)
+#define PNV_XSCOM_P10_EC_BASE(core) \
+ ((uint64_t)((((core) & ~0x3) + 0x20) << 24) + 0x20000 + (0x1000 << (3 - (core & 0x3))))
#define PNV_XSCOM_EX_DTS_RESULT0 0x50000
static void test_xscom_core(QTestState *qts, const PnvChip *chip)
{
- uint32_t first_core_dts0 = PNV_XSCOM_EX_DTS_RESULT0;
- uint64_t dts0;
+ if (chip->chip_type == PNV_CHIP_POWER10) {
+ uint32_t first_core_thread_state =
+ PNV_XSCOM_P10_EC_BASE(chip->first_core) + 0x412;
+ uint64_t thread_state;
+
+ thread_state = pnv_xscom_read(qts, chip, first_core_thread_state);
- if (chip->chip_type != PNV_CHIP_POWER9) {
- first_core_dts0 |= PNV_XSCOM_EX_BASE(chip->first_core);
+ g_assert_cmphex(thread_state, ==, 0);
} else {
- first_core_dts0 |= PNV_XSCOM_P9_EC_BASE(chip->first_core);
- }
+ uint32_t first_core_dts0 = PNV_XSCOM_EX_DTS_RESULT0;
+ uint64_t dts0;
- dts0 = pnv_xscom_read(qts, chip, first_core_dts0);
+ if (chip->chip_type == PNV_CHIP_POWER9) {
+ first_core_dts0 |= PNV_XSCOM_P9_EC_BASE(chip->first_core);
+ } else { /* POWER8 */
+ first_core_dts0 |= PNV_XSCOM_EX_BASE(chip->first_core);
+ }
- g_assert_cmphex(dts0, ==, 0x26f024f023f0000ull);
+ dts0 = pnv_xscom_read(qts, chip, first_core_dts0);
+
+ g_assert_cmphex(dts0, ==, 0x26f024f023f0000ull);
+ }
}
static void test_core(const void *data)
@@ -123,6 +147,8 @@ static void test_core(const void *data)
if (chip->chip_type == PNV_CHIP_POWER9) {
machine = "powernv9";
+ } else if (chip->chip_type == PNV_CHIP_POWER10) {
+ machine = "powernv10";
}
qts = qtest_initf("-M %s -accel tcg -cpu %s",
--
2.40.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH v2 0/2] ppc/pnv: Set P10 core xscom region size to match hardware
2023-07-06 5:39 [PATCH v2 0/2] ppc/pnv: Set P10 core xscom region size to match hardware Nicholas Piggin
2023-07-06 5:39 ` [PATCH v2 1/2] " Nicholas Piggin
2023-07-06 5:39 ` [PATCH v2 2/2] tests/qtest: Add xscom tests for powernv10 machine Nicholas Piggin
@ 2023-07-06 6:21 ` Cédric Le Goater
2023-07-06 7:19 ` Cédric Le Goater
2023-07-07 7:20 ` Daniel Henrique Barboza
4 siblings, 0 replies; 6+ messages in thread
From: Cédric Le Goater @ 2023-07-06 6:21 UTC (permalink / raw)
To: Nicholas Piggin, Daniel Henrique Barboza, Joel Stanley,
Frédéric Barrat
Cc: qemu-devel, qemu-ppc
On 7/6/23 07:39, Nicholas Piggin wrote:
> Sorry about the paper bag bug in the first version of the patch -
> I broke powernv8 and 9.
>
> This adds a xsom_size core class field to change the P10 size without
> changing the others.
>
> Also added a P10 xscom test, and passes make check.
Now, you know there is check-qtest-ppc64 :) XSCOM is important for
the machine to boot and I wish there were a few more low level tests.
XIVE for instance, to test IPIs.
Thanks,
C.
> Thanks,
> Nick
>
> Nicholas Piggin (2):
> ppc/pnv: Set P10 core xscom region size to match hardware
> tests/qtest: Add xscom tests for powernv10 machine
>
> hw/ppc/pnv_core.c | 6 +++--
> include/hw/ppc/pnv_core.h | 1 +
> include/hw/ppc/pnv_xscom.h | 2 +-
> tests/qtest/pnv-xscom-test.c | 44 ++++++++++++++++++++++++++++--------
> 4 files changed, 41 insertions(+), 12 deletions(-)
>
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v2 0/2] ppc/pnv: Set P10 core xscom region size to match hardware
2023-07-06 5:39 [PATCH v2 0/2] ppc/pnv: Set P10 core xscom region size to match hardware Nicholas Piggin
` (2 preceding siblings ...)
2023-07-06 6:21 ` [PATCH v2 0/2] ppc/pnv: Set P10 core xscom region size to match hardware Cédric Le Goater
@ 2023-07-06 7:19 ` Cédric Le Goater
2023-07-07 7:20 ` Daniel Henrique Barboza
4 siblings, 0 replies; 6+ messages in thread
From: Cédric Le Goater @ 2023-07-06 7:19 UTC (permalink / raw)
To: Nicholas Piggin, Daniel Henrique Barboza, Joel Stanley,
Frédéric Barrat
Cc: qemu-devel, qemu-ppc
On 7/6/23 07:39, Nicholas Piggin wrote:
> Sorry about the paper bag bug in the first version of the patch -
> I broke powernv8 and 9.
>
> This adds a xsom_size core class field to change the P10 size without
> changing the others.
>
> Also added a P10 xscom test, and passes make check.
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Tested-by: Cédric Le Goater <clg@kaod.org>
Thanks,
C.
>
> Thanks,
> Nick
>
> Nicholas Piggin (2):
> ppc/pnv: Set P10 core xscom region size to match hardware
> tests/qtest: Add xscom tests for powernv10 machine
>
> hw/ppc/pnv_core.c | 6 +++--
> include/hw/ppc/pnv_core.h | 1 +
> include/hw/ppc/pnv_xscom.h | 2 +-
> tests/qtest/pnv-xscom-test.c | 44 ++++++++++++++++++++++++++++--------
> 4 files changed, 41 insertions(+), 12 deletions(-)
>
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v2 0/2] ppc/pnv: Set P10 core xscom region size to match hardware
2023-07-06 5:39 [PATCH v2 0/2] ppc/pnv: Set P10 core xscom region size to match hardware Nicholas Piggin
` (3 preceding siblings ...)
2023-07-06 7:19 ` Cédric Le Goater
@ 2023-07-07 7:20 ` Daniel Henrique Barboza
4 siblings, 0 replies; 6+ messages in thread
From: Daniel Henrique Barboza @ 2023-07-07 7:20 UTC (permalink / raw)
To: Nicholas Piggin, Joel Stanley, Cédric Le Goater,
Frédéric Barrat
Cc: qemu-devel, qemu-ppc
Queued in gitlab.com/danielhb/qemu/tree/ppc-next. Thanks,
Daniel
On 7/6/23 02:39, Nicholas Piggin wrote:
> Sorry about the paper bag bug in the first version of the patch -
> I broke powernv8 and 9.
>
> This adds a xsom_size core class field to change the P10 size without
> changing the others.
>
> Also added a P10 xscom test, and passes make check.
>
> Thanks,
> Nick
>
> Nicholas Piggin (2):
> ppc/pnv: Set P10 core xscom region size to match hardware
> tests/qtest: Add xscom tests for powernv10 machine
>
> hw/ppc/pnv_core.c | 6 +++--
> include/hw/ppc/pnv_core.h | 1 +
> include/hw/ppc/pnv_xscom.h | 2 +-
> tests/qtest/pnv-xscom-test.c | 44 ++++++++++++++++++++++++++++--------
> 4 files changed, 41 insertions(+), 12 deletions(-)
>
^ permalink raw reply [flat|nested] 6+ messages in thread