From: Richard Henderson <richard.henderson@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>,
qemu-arm@nongnu.org, qemu-devel@nongnu.org
Subject: Re: [PATCH v3 02/44] target/arm: Implement widening/narrowing MVE VLDR/VSTR insns
Date: Fri, 18 Jun 2021 07:47:45 -0700 [thread overview]
Message-ID: <e1d8014f-c102-395d-1f1c-d02276a7c5d1@linaro.org> (raw)
In-Reply-To: <20210617121628.20116-3-peter.maydell@linaro.org>
On 6/17/21 5:15 AM, Peter Maydell wrote:
> Implement the variants of MVE VLDR (encodings T1, T2) which perform
> "widening" loads where bytes or halfwords are loaded from memory and
> zero or sign-extended into halfword or word length vector elements,
> and the narrowing MVE VSTR (encodings T1, T2) where bytes or
> halfwords are stored from halfword or word elements.
>
> Signed-off-by: Peter Maydell<peter.maydell@linaro.org>
> ---
> v2->v3 changes: pass MSIZE, so we advance the address by
> the right amount in these widening/narrowing versions.
> ---
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
next prev parent reply other threads:[~2021-06-18 14:49 UTC|newest]
Thread overview: 54+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-17 12:15 [PATCH v3 00/44] target/arm: First slice of MVE implementation Peter Maydell
2021-06-17 12:15 ` [PATCH v3 01/44] target/arm: Implement MVE VLDR/VSTR (non-widening forms) Peter Maydell
2021-06-17 13:30 ` Claudio Fontana
2021-06-17 13:47 ` Peter Maydell
2021-06-18 14:44 ` Richard Henderson
2021-06-17 12:15 ` [PATCH v3 02/44] target/arm: Implement widening/narrowing MVE VLDR/VSTR insns Peter Maydell
2021-06-18 14:47 ` Richard Henderson [this message]
2021-06-17 12:15 ` [PATCH v3 03/44] target/arm: Implement MVE VCLZ Peter Maydell
2021-06-21 13:28 ` Peter Maydell
2021-06-21 16:12 ` Peter Maydell
2021-06-17 12:15 ` [PATCH v3 04/44] target/arm: Implement MVE VCLS Peter Maydell
2021-06-17 12:15 ` [PATCH v3 05/44] target/arm: Implement MVE VREV16, VREV32, VREV64 Peter Maydell
2021-06-17 12:15 ` [PATCH v3 06/44] target/arm: Implement MVE VMVN (register) Peter Maydell
2021-06-17 12:15 ` [PATCH v3 07/44] target/arm: Implement MVE VABS Peter Maydell
2021-06-17 12:15 ` [PATCH v3 08/44] target/arm: Implement MVE VNEG Peter Maydell
2021-06-17 12:15 ` [PATCH v3 09/44] tcg: Make gen_dup_i32/i64() public as tcg_gen_dup_i32/i64 Peter Maydell
2021-06-17 12:15 ` [PATCH v3 10/44] target/arm: Implement MVE VDUP Peter Maydell
2021-06-17 12:15 ` [PATCH v3 11/44] target/arm: Implement MVE VAND, VBIC, VORR, VORN, VEOR Peter Maydell
2021-06-17 12:15 ` [PATCH v3 12/44] target/arm: Implement MVE VADD, VSUB, VMUL Peter Maydell
2021-06-17 12:15 ` [PATCH v3 13/44] target/arm: Implement MVE VMULH Peter Maydell
2021-06-17 12:15 ` [PATCH v3 14/44] target/arm: Implement MVE VRMULH Peter Maydell
2021-06-17 12:15 ` [PATCH v3 15/44] target/arm: Implement MVE VMAX, VMIN Peter Maydell
2021-06-17 12:16 ` [PATCH v3 16/44] target/arm: Implement MVE VABD Peter Maydell
2021-06-17 12:16 ` [PATCH v3 17/44] target/arm: Implement MVE VHADD, VHSUB Peter Maydell
2021-06-17 12:16 ` [PATCH v3 18/44] target/arm: Implement MVE VMULL Peter Maydell
2021-06-17 12:16 ` [PATCH v3 19/44] target/arm: Implement MVE VMLALDAV Peter Maydell
2021-06-17 12:16 ` [PATCH v3 20/44] target/arm: Implement MVE VMLSLDAV Peter Maydell
2021-06-17 12:16 ` [PATCH v3 21/44] target/arm: Implement MVE VRMLALDAVH, VRMLSLDAVH Peter Maydell
2021-06-17 12:16 ` [PATCH v3 22/44] target/arm: Implement MVE VADD (scalar) Peter Maydell
2021-06-17 12:16 ` [PATCH v3 23/44] target/arm: Implement MVE VSUB, VMUL (scalar) Peter Maydell
2021-06-17 12:16 ` [PATCH v3 24/44] target/arm: Implement MVE VHADD, VHSUB (scalar) Peter Maydell
2021-06-17 12:16 ` [PATCH v3 25/44] target/arm: Implement MVE VBRSR Peter Maydell
2021-06-17 12:16 ` [PATCH v3 26/44] target/arm: Implement MVE VPST Peter Maydell
2021-06-17 12:16 ` [PATCH v3 27/44] target/arm: Implement MVE VQADD and VQSUB Peter Maydell
2021-06-17 12:16 ` [PATCH v3 28/44] target/arm: Implement MVE VQDMULH and VQRDMULH (scalar) Peter Maydell
2021-06-17 12:16 ` [PATCH v3 29/44] target/arm: Implement MVE VQDMULL scalar Peter Maydell
2021-06-17 12:16 ` [PATCH v3 30/44] target/arm: Implement MVE VQDMULH, VQRDMULH (vector) Peter Maydell
2021-06-17 12:16 ` [PATCH v3 31/44] target/arm: Implement MVE VQADD, VQSUB (vector) Peter Maydell
2021-06-17 12:16 ` [PATCH v3 32/44] target/arm: Implement MVE VQSHL (vector) Peter Maydell
2021-06-17 12:16 ` [PATCH v3 33/44] target/arm: Implement MVE VQRSHL Peter Maydell
2021-06-17 12:16 ` [PATCH v3 34/44] target/arm: Implement MVE VSHL insn Peter Maydell
2021-06-17 12:16 ` [PATCH v3 35/44] target/arm: Implmement MVE VRSHL Peter Maydell
2021-06-17 13:20 ` Claudio Fontana
2021-06-17 13:23 ` Peter Maydell
2021-06-17 12:16 ` [PATCH v3 36/44] target/arm: Implement MVE VQDMLADH and VQRDMLADH Peter Maydell
2021-06-17 12:16 ` [PATCH v3 37/44] target/arm: Implement MVE VQDMLSDH and VQRDMLSDH Peter Maydell
2021-06-17 12:16 ` [PATCH v3 38/44] target/arm: Implement MVE VQDMULL (vector) Peter Maydell
2021-06-17 12:16 ` [PATCH v3 39/44] target/arm: Implement MVE VRHADD Peter Maydell
2021-06-17 12:16 ` [PATCH v3 40/44] target/arm: Implement MVE VADC, VSBC Peter Maydell
2021-06-17 12:16 ` [PATCH v3 41/44] target/arm: Implement MVE VCADD Peter Maydell
2021-06-17 12:16 ` [PATCH v3 42/44] target/arm: Implement MVE VHCADD Peter Maydell
2021-06-17 12:16 ` [PATCH v3 43/44] target/arm: Implement MVE VADDV Peter Maydell
2021-06-17 12:16 ` [PATCH v3 44/44] target/arm: Make VMOV scalar <-> gpreg beatwise for MVE Peter Maydell
2021-06-17 13:10 ` [PATCH v3 00/44] target/arm: First slice of MVE implementation no-reply
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