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From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: Daniel Henrique Barboza <dbarboza@ventanamicro.com>,
	qemu-devel@nongnu.org
Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com,
	bmeng@tinylab.org, liweiwei@iscas.ac.cn,
	zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com,
	ajones@ventanamicro.com
Subject: Re: [PATCH v5 11/19] target/riscv/cpu: add misa_ext_info_arr[]
Date: Tue, 27 Jun 2023 23:29:54 +0200	[thread overview]
Message-ID: <e217dfb9-a4c2-12e3-6053-ef2167f30a05@linaro.org> (raw)
In-Reply-To: <20230627163203.49422-12-dbarboza@ventanamicro.com>

On 27/6/23 18:31, Daniel Henrique Barboza wrote:
> Next patch will add KVM specific user properties for both MISA and
> multi-letter extensions. For MISA extensions we want to make use of what
> is already available in misa_ext_cfgs[] to avoid code repetition.
> 
> misa_ext_info_arr[] array will hold name and description for each MISA
> extension that misa_ext_cfgs[] is declaring. We'll then use this new
> array in KVM code to avoid duplicating strings.
> 
> There's nothing holding us back from doing the same with multi-letter
> extensions. For now doing just with MISA extensions is enough.
> 
> Suggested-by: Andrew Jones <ajones@ventanamicro.com>
> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
> Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
> ---
>   target/riscv/cpu.c | 60 ++++++++++++++++++++++++++--------------------
>   target/riscv/cpu.h | 11 ++++++++-
>   2 files changed, 44 insertions(+), 27 deletions(-)


> +const MISAExtInfo misa_ext_info_arr[] = {
> +    [RVA] = {"a", "Atomic instructions"},
> +    [RVC] = {"c", "Compressed instructions"},
> +    [RVD] = {"d", "Double-precision float point"},
> +    [RVF] = {"f", "Single-precision float point"},
> +    [RVI] = {"i", "Base integer instruction set"},
> +    [RVE] = {"e", "Base integer instruction set (embedded)"},
> +    [RVM] = {"m", "Integer multiplication and division"},
> +    [RVS] = {"s", "Supervisor-level instructions"},
> +    [RVU] = {"u", "User-level instructions"},
> +    [RVH] = {"h", "Hypervisor"},
> +    [RVJ] = {"x-j", "Dynamic translated languages"},
> +    [RVV] = {"v", "Vector operations"},
> +    [RVG] = {"g", "General purpose (IMAFD_Zicsr_Zifencei)"},
> +};

Personally I prefer using a getter() helper because we can check in
a single place for empty entries in the array.

IIUC this 13-entries array takes 4MiB (RVV is '1<<21' = 2MiB).

Wouldn't it be clever to index by [a-z]? Except "x-j"...




  reply	other threads:[~2023-06-27 21:31 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-06-27 16:31 [PATCH v5 00/19] target/riscv, KVM: fixes and enhancements Daniel Henrique Barboza
2023-06-27 16:31 ` [PATCH v5 01/19] target/riscv: skip features setup for KVM CPUs Daniel Henrique Barboza
2023-06-27 21:19   ` Philippe Mathieu-Daudé
2023-06-27 23:24     ` Daniel Henrique Barboza
2023-06-28  6:39       ` Philippe Mathieu-Daudé
2023-06-27 16:31 ` [PATCH v5 02/19] hw/riscv/virt.c: skip 'mmu-type' FDT if satp mode not set Daniel Henrique Barboza
2023-06-27 21:20   ` Philippe Mathieu-Daudé
2023-06-27 16:31 ` [PATCH v5 03/19] target/riscv/cpu.c: restrict 'mvendorid' value Daniel Henrique Barboza
2023-06-27 16:31 ` [PATCH v5 04/19] target/riscv/cpu.c: restrict 'mimpid' value Daniel Henrique Barboza
2023-06-27 16:31 ` [PATCH v5 05/19] target/riscv/cpu.c: restrict 'marchid' value Daniel Henrique Barboza
2023-06-27 16:31 ` [PATCH v5 06/19] target/riscv: use KVM scratch CPUs to init KVM properties Daniel Henrique Barboza
2023-06-27 16:31 ` [PATCH v5 07/19] target/riscv: read marchid/mimpid in kvm_riscv_init_machine_ids() Daniel Henrique Barboza
2023-06-27 16:31 ` [PATCH v5 08/19] target/riscv: handle mvendorid/marchid/mimpid for KVM CPUs Daniel Henrique Barboza
2023-06-27 16:31 ` [PATCH v5 09/19] linux-headers: Update to v6.4-rc1 Daniel Henrique Barboza
2023-06-27 16:31 ` [PATCH v5 10/19] target/riscv/kvm.c: init 'misa_ext_mask' with scratch CPU Daniel Henrique Barboza
2023-06-27 16:31 ` [PATCH v5 11/19] target/riscv/cpu: add misa_ext_info_arr[] Daniel Henrique Barboza
2023-06-27 21:29   ` Philippe Mathieu-Daudé [this message]
2023-06-28  0:04     ` Daniel Henrique Barboza
2023-06-28  6:35       ` Philippe Mathieu-Daudé
2023-06-28  8:10     ` Andrew Jones
2023-06-27 16:31 ` [PATCH v5 12/19] target/riscv: add KVM specific MISA properties Daniel Henrique Barboza
2023-06-27 16:31 ` [PATCH v5 13/19] target/riscv/kvm.c: update KVM MISA bits Daniel Henrique Barboza
2023-06-27 16:31 ` [PATCH v5 14/19] target/riscv/kvm.c: add multi-letter extension KVM properties Daniel Henrique Barboza
2023-06-27 16:31 ` [PATCH v5 15/19] target/riscv/cpu.c: remove priv_ver check from riscv_isa_string_ext() Daniel Henrique Barboza
2023-06-27 16:32 ` [PATCH v5 16/19] target/riscv/cpu.c: create KVM mock properties Daniel Henrique Barboza
2023-06-28  8:14   ` Andrew Jones
2023-06-27 16:32 ` [PATCH v5 17/19] target/riscv: update multi-letter extension KVM properties Daniel Henrique Barboza
2023-06-27 16:32 ` [PATCH v5 18/19] target/riscv/kvm.c: add kvmconfig_get_cfg_addr() helper Daniel Henrique Barboza
2023-06-27 16:32 ` [PATCH v5 19/19] target/riscv/kvm.c: read/write (cbom|cboz)_blocksize in KVM Daniel Henrique Barboza

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