* [PATCH 1/3] ppc/pnv: Introduce a pnv-phb5 device to match root port
2022-03-10 15:50 [PATCH 0/3] Fix user-created PHB devices on POWER10 Frederic Barrat
@ 2022-03-10 15:50 ` Frederic Barrat
2022-03-10 16:16 ` Cédric Le Goater
2022-03-10 15:51 ` [PATCH 2/3] ppc/pnv: Fixes for user-created pnv-phb5 devices Frederic Barrat
` (2 subsequent siblings)
3 siblings, 1 reply; 8+ messages in thread
From: Frederic Barrat @ 2022-03-10 15:50 UTC (permalink / raw)
To: clg, danielhb413, qemu-ppc, qemu-devel
We already have the pnv-phb3 and pnv-phb4 devices for POWER8 and
POWER9 respectively. POWER10 uses version 5 of the PHB. It is very
close to the PHB4 from POWER9, at least in our model and we could
almost keep using the PHB4 model. However the matching root port
pnv-phb5-root-port is specific to POWER10 so to avoid confusion as
well as making it easy to introduce differences later, we create a
pnv-phb5 class, which is mostly an alias for pnv-phb4 for now.
With this patch, the command line for a user-created PHB on powernv10
becomes:
-machine powernv10 -nodefaults -device pnv-phb5 -device pnv-phb5-root-port
Fixes: 623575e16cd5 ("ppc/pnv: Add model for POWER10 PHB5 PCIe Host bridge")
Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com>
---
hw/pci-host/pnv_phb4.c | 7 +++++++
hw/pci-host/pnv_phb4_pec.c | 9 +++++----
include/hw/pci-host/pnv_phb4.h | 5 +++++
3 files changed, 17 insertions(+), 4 deletions(-)
diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c
index b5b384e9ee..d1a911f988 100644
--- a/hw/pci-host/pnv_phb4.c
+++ b/hw/pci-host/pnv_phb4.c
@@ -1783,6 +1783,12 @@ static const TypeInfo pnv_phb4_type_info = {
}
};
+static const TypeInfo pnv_phb5_type_info = {
+ .name = TYPE_PNV_PHB5,
+ .parent = TYPE_PNV_PHB4,
+ .instance_size = sizeof(PnvPHB4),
+};
+
static void pnv_phb4_root_bus_class_init(ObjectClass *klass, void *data)
{
BusClass *k = BUS_CLASS(klass);
@@ -1907,6 +1913,7 @@ static void pnv_phb4_register_types(void)
type_register_static(&pnv_phb5_root_port_info);
type_register_static(&pnv_phb4_root_port_info);
type_register_static(&pnv_phb4_type_info);
+ type_register_static(&pnv_phb5_type_info);
type_register_static(&pnv_phb4_iommu_memory_region_info);
}
diff --git a/hw/pci-host/pnv_phb4_pec.c b/hw/pci-host/pnv_phb4_pec.c
index 0ab36e9c8f..a0dfa77c84 100644
--- a/hw/pci-host/pnv_phb4_pec.c
+++ b/hw/pci-host/pnv_phb4_pec.c
@@ -116,7 +116,8 @@ static void pnv_pec_default_phb_realize(PnvPhb4PecState *pec,
int stack_no,
Error **errp)
{
- PnvPHB4 *phb = PNV_PHB4(qdev_new(TYPE_PNV_PHB4));
+ PnvPhb4PecClass *pecc = PNV_PHB4_PEC_GET_CLASS(pec);
+ PnvPHB4 *phb = PNV_PHB4(qdev_new(pecc->phb_type));
int phb_id = pnv_phb4_pec_get_phb_id(pec, stack_no);
object_property_set_link(OBJECT(phb), "pec", OBJECT(pec),
@@ -131,9 +132,7 @@ static void pnv_pec_default_phb_realize(PnvPhb4PecState *pec,
}
/* Add a single Root port if running with defaults */
- pnv_phb_attach_root_port(PCI_HOST_BRIDGE(phb),
- PNV_PHB4_PEC_GET_CLASS(pec)->rp_model);
-
+ pnv_phb_attach_root_port(PCI_HOST_BRIDGE(phb), pecc->rp_model);
}
static void pnv_pec_realize(DeviceState *dev, Error **errp)
@@ -265,6 +264,7 @@ static void pnv_pec_class_init(ObjectClass *klass, void *data)
pecc->stk_compat = stk_compat;
pecc->stk_compat_size = sizeof(stk_compat);
pecc->version = PNV_PHB4_VERSION;
+ pecc->phb_type = TYPE_PNV_PHB4;
pecc->num_phbs = pnv_pec_num_phbs;
pecc->rp_model = TYPE_PNV_PHB4_ROOT_PORT;
}
@@ -317,6 +317,7 @@ static void pnv_phb5_pec_class_init(ObjectClass *klass, void *data)
pecc->stk_compat = stk_compat;
pecc->stk_compat_size = sizeof(stk_compat);
pecc->version = PNV_PHB5_VERSION;
+ pecc->phb_type = TYPE_PNV_PHB5;
pecc->num_phbs = pnv_phb5_pec_num_stacks;
pecc->rp_model = TYPE_PNV_PHB5_ROOT_PORT;
}
diff --git a/include/hw/pci-host/pnv_phb4.h b/include/hw/pci-host/pnv_phb4.h
index fbcf5bfb55..b02ecdceaa 100644
--- a/include/hw/pci-host/pnv_phb4.h
+++ b/include/hw/pci-host/pnv_phb4.h
@@ -203,6 +203,7 @@ struct PnvPhb4PecClass {
const char *stk_compat;
int stk_compat_size;
uint64_t version;
+ const char *phb_type;
const uint32_t *num_phbs;
const char *rp_model;
};
@@ -211,6 +212,10 @@ struct PnvPhb4PecClass {
* POWER10 definitions
*/
+#define TYPE_PNV_PHB5 "pnv-phb5"
+#define PNV_PHB5(obj) \
+ OBJECT_CHECK(PnvPhb4, (obj), TYPE_PNV_PHB5)
+
#define PNV_PHB5_VERSION 0x000000a500000001ull
#define PNV_PHB5_DEVICE_ID 0x0652
--
2.35.1
^ permalink raw reply related [flat|nested] 8+ messages in thread* Re: [PATCH 1/3] ppc/pnv: Introduce a pnv-phb5 device to match root port
2022-03-10 15:50 ` [PATCH 1/3] ppc/pnv: Introduce a pnv-phb5 device to match root port Frederic Barrat
@ 2022-03-10 16:16 ` Cédric Le Goater
0 siblings, 0 replies; 8+ messages in thread
From: Cédric Le Goater @ 2022-03-10 16:16 UTC (permalink / raw)
To: Frederic Barrat, danielhb413, qemu-ppc, qemu-devel
On 3/10/22 16:50, Frederic Barrat wrote:
> We already have the pnv-phb3 and pnv-phb4 devices for POWER8 and
> POWER9 respectively. POWER10 uses version 5 of the PHB. It is very
> close to the PHB4 from POWER9, at least in our model and we could
> almost keep using the PHB4 model. However the matching root port
> pnv-phb5-root-port is specific to POWER10 so to avoid confusion as
> well as making it easy to introduce differences later, we create a
> pnv-phb5 class, which is mostly an alias for pnv-phb4 for now.
>
> With this patch, the command line for a user-created PHB on powernv10
> becomes:
> -machine powernv10 -nodefaults -device pnv-phb5 -device pnv-phb5-root-port
>
> Fixes: 623575e16cd5 ("ppc/pnv: Add model for POWER10 PHB5 PCIe Host bridge")
> Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Queued for 7.0.
Thanks,
C.
> ---
> hw/pci-host/pnv_phb4.c | 7 +++++++
> hw/pci-host/pnv_phb4_pec.c | 9 +++++----
> include/hw/pci-host/pnv_phb4.h | 5 +++++
> 3 files changed, 17 insertions(+), 4 deletions(-)
>
> diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c
> index b5b384e9ee..d1a911f988 100644
> --- a/hw/pci-host/pnv_phb4.c
> +++ b/hw/pci-host/pnv_phb4.c
> @@ -1783,6 +1783,12 @@ static const TypeInfo pnv_phb4_type_info = {
> }
> };
>
> +static const TypeInfo pnv_phb5_type_info = {
> + .name = TYPE_PNV_PHB5,
> + .parent = TYPE_PNV_PHB4,
> + .instance_size = sizeof(PnvPHB4),
> +};
> +
> static void pnv_phb4_root_bus_class_init(ObjectClass *klass, void *data)
> {
> BusClass *k = BUS_CLASS(klass);
> @@ -1907,6 +1913,7 @@ static void pnv_phb4_register_types(void)
> type_register_static(&pnv_phb5_root_port_info);
> type_register_static(&pnv_phb4_root_port_info);
> type_register_static(&pnv_phb4_type_info);
> + type_register_static(&pnv_phb5_type_info);
> type_register_static(&pnv_phb4_iommu_memory_region_info);
> }
>
> diff --git a/hw/pci-host/pnv_phb4_pec.c b/hw/pci-host/pnv_phb4_pec.c
> index 0ab36e9c8f..a0dfa77c84 100644
> --- a/hw/pci-host/pnv_phb4_pec.c
> +++ b/hw/pci-host/pnv_phb4_pec.c
> @@ -116,7 +116,8 @@ static void pnv_pec_default_phb_realize(PnvPhb4PecState *pec,
> int stack_no,
> Error **errp)
> {
> - PnvPHB4 *phb = PNV_PHB4(qdev_new(TYPE_PNV_PHB4));
> + PnvPhb4PecClass *pecc = PNV_PHB4_PEC_GET_CLASS(pec);
> + PnvPHB4 *phb = PNV_PHB4(qdev_new(pecc->phb_type));
> int phb_id = pnv_phb4_pec_get_phb_id(pec, stack_no);
>
> object_property_set_link(OBJECT(phb), "pec", OBJECT(pec),
> @@ -131,9 +132,7 @@ static void pnv_pec_default_phb_realize(PnvPhb4PecState *pec,
> }
>
> /* Add a single Root port if running with defaults */
> - pnv_phb_attach_root_port(PCI_HOST_BRIDGE(phb),
> - PNV_PHB4_PEC_GET_CLASS(pec)->rp_model);
> -
> + pnv_phb_attach_root_port(PCI_HOST_BRIDGE(phb), pecc->rp_model);
> }
>
> static void pnv_pec_realize(DeviceState *dev, Error **errp)
> @@ -265,6 +264,7 @@ static void pnv_pec_class_init(ObjectClass *klass, void *data)
> pecc->stk_compat = stk_compat;
> pecc->stk_compat_size = sizeof(stk_compat);
> pecc->version = PNV_PHB4_VERSION;
> + pecc->phb_type = TYPE_PNV_PHB4;
> pecc->num_phbs = pnv_pec_num_phbs;
> pecc->rp_model = TYPE_PNV_PHB4_ROOT_PORT;
> }
> @@ -317,6 +317,7 @@ static void pnv_phb5_pec_class_init(ObjectClass *klass, void *data)
> pecc->stk_compat = stk_compat;
> pecc->stk_compat_size = sizeof(stk_compat);
> pecc->version = PNV_PHB5_VERSION;
> + pecc->phb_type = TYPE_PNV_PHB5;
> pecc->num_phbs = pnv_phb5_pec_num_stacks;
> pecc->rp_model = TYPE_PNV_PHB5_ROOT_PORT;
> }
> diff --git a/include/hw/pci-host/pnv_phb4.h b/include/hw/pci-host/pnv_phb4.h
> index fbcf5bfb55..b02ecdceaa 100644
> --- a/include/hw/pci-host/pnv_phb4.h
> +++ b/include/hw/pci-host/pnv_phb4.h
> @@ -203,6 +203,7 @@ struct PnvPhb4PecClass {
> const char *stk_compat;
> int stk_compat_size;
> uint64_t version;
> + const char *phb_type;
> const uint32_t *num_phbs;
> const char *rp_model;
> };
> @@ -211,6 +212,10 @@ struct PnvPhb4PecClass {
> * POWER10 definitions
> */
>
> +#define TYPE_PNV_PHB5 "pnv-phb5"
> +#define PNV_PHB5(obj) \
> + OBJECT_CHECK(PnvPhb4, (obj), TYPE_PNV_PHB5)
> +
> #define PNV_PHB5_VERSION 0x000000a500000001ull
> #define PNV_PHB5_DEVICE_ID 0x0652
>
x
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 2/3] ppc/pnv: Fixes for user-created pnv-phb5 devices
2022-03-10 15:50 [PATCH 0/3] Fix user-created PHB devices on POWER10 Frederic Barrat
2022-03-10 15:50 ` [PATCH 1/3] ppc/pnv: Introduce a pnv-phb5 device to match root port Frederic Barrat
@ 2022-03-10 15:51 ` Frederic Barrat
2022-03-10 16:16 ` Cédric Le Goater
2022-03-10 15:51 ` [PATCH 3/3] ppc/pnv: Fix PEC lookup function for POWER10 Frederic Barrat
2022-03-14 15:21 ` [PATCH 0/3] Fix user-created PHB devices on POWER10 Cédric Le Goater
3 siblings, 1 reply; 8+ messages in thread
From: Frederic Barrat @ 2022-03-10 15:51 UTC (permalink / raw)
To: clg, danielhb413, qemu-ppc, qemu-devel
Two small fixes to fix user-created devices for POWER10:
- always create the PECs (PCI Express Controller) for the system. The
PECs host the PHBs and we try to find the matching PEC when creating a
PHB, so it must exist. It also matches what we do on POWER9
- the machine class must allow dynamically allocated system bus
Fixes: 623575e16cd5 ("ppc/pnv: Add model for POWER10 PHB5 PCIe Host bridge")
Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com>
---
hw/ppc/pnv.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index 0ac86e104f..df58403a3a 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -1600,9 +1600,7 @@ static void pnv_chip_power10_instance_init(Object *obj)
object_initialize_child(obj, "occ", &chip10->occ, TYPE_PNV10_OCC);
object_initialize_child(obj, "homer", &chip10->homer, TYPE_PNV10_HOMER);
- if (defaults_enabled()) {
- chip->num_pecs = pcc->num_pecs;
- }
+ chip->num_pecs = pcc->num_pecs;
for (i = 0; i < chip->num_pecs; i++) {
object_initialize_child(obj, "pec[*]", &chip10->pecs[i],
@@ -2171,6 +2169,8 @@ static void pnv_machine_power10_class_init(ObjectClass *oc, void *data)
pmc->dt_power_mgt = pnv_dt_power_mgt;
xfc->match_nvt = pnv10_xive_match_nvt;
+
+ machine_class_allow_dynamic_sysbus_dev(mc, TYPE_PNV_PHB5);
}
static bool pnv_machine_get_hb(Object *obj, Error **errp)
--
2.35.1
^ permalink raw reply related [flat|nested] 8+ messages in thread* Re: [PATCH 2/3] ppc/pnv: Fixes for user-created pnv-phb5 devices
2022-03-10 15:51 ` [PATCH 2/3] ppc/pnv: Fixes for user-created pnv-phb5 devices Frederic Barrat
@ 2022-03-10 16:16 ` Cédric Le Goater
0 siblings, 0 replies; 8+ messages in thread
From: Cédric Le Goater @ 2022-03-10 16:16 UTC (permalink / raw)
To: Frederic Barrat, danielhb413, qemu-ppc, qemu-devel
On 3/10/22 16:51, Frederic Barrat wrote:
> Two small fixes to fix user-created devices for POWER10:
> - always create the PECs (PCI Express Controller) for the system. The
> PECs host the PHBs and we try to find the matching PEC when creating a
> PHB, so it must exist. It also matches what we do on POWER9
> - the machine class must allow dynamically allocated system bus
>
> Fixes: 623575e16cd5 ("ppc/pnv: Add model for POWER10 PHB5 PCIe Host bridge")
> Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com>
> ---
> hw/ppc/pnv.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Queued for 7.0.
Thanks,
C.
>
> diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
> index 0ac86e104f..df58403a3a 100644
> --- a/hw/ppc/pnv.c
> +++ b/hw/ppc/pnv.c
> @@ -1600,9 +1600,7 @@ static void pnv_chip_power10_instance_init(Object *obj)
> object_initialize_child(obj, "occ", &chip10->occ, TYPE_PNV10_OCC);
> object_initialize_child(obj, "homer", &chip10->homer, TYPE_PNV10_HOMER);
>
> - if (defaults_enabled()) {
> - chip->num_pecs = pcc->num_pecs;
> - }
> + chip->num_pecs = pcc->num_pecs;
>
> for (i = 0; i < chip->num_pecs; i++) {
> object_initialize_child(obj, "pec[*]", &chip10->pecs[i],
> @@ -2171,6 +2169,8 @@ static void pnv_machine_power10_class_init(ObjectClass *oc, void *data)
> pmc->dt_power_mgt = pnv_dt_power_mgt;
>
> xfc->match_nvt = pnv10_xive_match_nvt;
> +
> + machine_class_allow_dynamic_sysbus_dev(mc, TYPE_PNV_PHB5);
> }
>
> static bool pnv_machine_get_hb(Object *obj, Error **errp)
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 3/3] ppc/pnv: Fix PEC lookup function for POWER10
2022-03-10 15:50 [PATCH 0/3] Fix user-created PHB devices on POWER10 Frederic Barrat
2022-03-10 15:50 ` [PATCH 1/3] ppc/pnv: Introduce a pnv-phb5 device to match root port Frederic Barrat
2022-03-10 15:51 ` [PATCH 2/3] ppc/pnv: Fixes for user-created pnv-phb5 devices Frederic Barrat
@ 2022-03-10 15:51 ` Frederic Barrat
2022-03-10 16:17 ` Cédric Le Goater
2022-03-14 15:21 ` [PATCH 0/3] Fix user-created PHB devices on POWER10 Cédric Le Goater
3 siblings, 1 reply; 8+ messages in thread
From: Frederic Barrat @ 2022-03-10 15:51 UTC (permalink / raw)
To: clg, danielhb413, qemu-ppc, qemu-devel
The PEC array used when looking for the PEC hosting a PHB is stored in
the chip structure. The array is at a different offset in Pnv9Chip and
Pnv10Chip. The lookup function was therefore not working properly on
POWER10.
This patch fixes it by introducing a class method to get the correct
PEC pointer based on the chip object and PEC index.
Fixes: 623575e16cd5 ("ppc/pnv: Add model for POWER10 PHB5 PCIe Host bridge")
Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com>
---
hw/pci-host/pnv_phb4.c | 5 ++---
hw/ppc/pnv.c | 14 ++++++++++++++
include/hw/ppc/pnv.h | 1 +
3 files changed, 17 insertions(+), 3 deletions(-)
diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c
index d1a911f988..4732633833 100644
--- a/hw/pci-host/pnv_phb4.c
+++ b/hw/pci-host/pnv_phb4.c
@@ -1548,7 +1548,6 @@ static void pnv_phb4_instance_init(Object *obj)
static PnvPhb4PecState *pnv_phb4_get_pec(PnvChip *chip, PnvPHB4 *phb,
Error **errp)
{
- Pnv9Chip *chip9 = PNV9_CHIP(chip);
int chip_id = phb->chip_id;
int index = phb->phb_id;
int i, j;
@@ -1556,9 +1555,9 @@ static PnvPhb4PecState *pnv_phb4_get_pec(PnvChip *chip, PnvPHB4 *phb,
for (i = 0; i < chip->num_pecs; i++) {
/*
* For each PEC, check the amount of phbs it supports
- * and see if the given phb4 index matches an index.
+ * and see if the given phb index matches an index.
*/
- PnvPhb4PecState *pec = &chip9->pecs[i];
+ PnvPhb4PecState *pec = PNV_CHIP_GET_CLASS(chip)->get_pec(chip, i);
for (j = 0; j < pec->num_phbs; j++) {
if (index == pnv_phb4_pec_get_phb_id(pec, j)) {
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index df58403a3a..3a676cd570 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -1561,6 +1561,12 @@ static uint32_t pnv_chip_power9_xscom_pcba(PnvChip *chip, uint64_t addr)
return addr >> 3;
}
+static PnvPhb4PecState *pnv_chip_power9_get_pec(PnvChip *chip, uint32_t index)
+{
+ Pnv9Chip *chip9 = PNV9_CHIP(chip);
+ return &chip9->pecs[index];
+}
+
static void pnv_chip_power9_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@@ -1580,6 +1586,7 @@ static void pnv_chip_power9_class_init(ObjectClass *klass, void *data)
k->xscom_pcba = pnv_chip_power9_xscom_pcba;
dc->desc = "PowerNV Chip POWER9";
k->num_pecs = PNV9_CHIP_MAX_PEC;
+ k->get_pec = pnv_chip_power9_get_pec;
device_class_set_parent_realize(dc, pnv_chip_power9_realize,
&k->parent_realize);
@@ -1769,6 +1776,12 @@ static uint32_t pnv_chip_power10_xscom_pcba(PnvChip *chip, uint64_t addr)
return addr >> 3;
}
+static PnvPhb4PecState *pnv_chip_power10_get_pec(PnvChip *chip, uint32_t index)
+{
+ Pnv10Chip *chip10 = PNV10_CHIP(chip);
+ return &chip10->pecs[index];
+}
+
static void pnv_chip_power10_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@@ -1788,6 +1801,7 @@ static void pnv_chip_power10_class_init(ObjectClass *klass, void *data)
k->xscom_pcba = pnv_chip_power10_xscom_pcba;
dc->desc = "PowerNV Chip POWER10";
k->num_pecs = PNV10_CHIP_MAX_PEC;
+ k->get_pec = pnv_chip_power10_get_pec;
device_class_set_parent_realize(dc, pnv_chip_power10_realize,
&k->parent_realize);
diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h
index 1e34ddd502..282f76ba08 100644
--- a/include/hw/ppc/pnv.h
+++ b/include/hw/ppc/pnv.h
@@ -163,6 +163,7 @@ struct PnvChipClass {
void (*pic_print_info)(PnvChip *chip, Monitor *mon);
uint64_t (*xscom_core_base)(PnvChip *chip, uint32_t core_id);
uint32_t (*xscom_pcba)(PnvChip *chip, uint64_t addr);
+ PnvPhb4PecState *(*get_pec)(PnvChip *chip, uint32_t index);
};
#define PNV_CHIP_TYPE_SUFFIX "-" TYPE_PNV_CHIP
--
2.35.1
^ permalink raw reply related [flat|nested] 8+ messages in thread* Re: [PATCH 3/3] ppc/pnv: Fix PEC lookup function for POWER10
2022-03-10 15:51 ` [PATCH 3/3] ppc/pnv: Fix PEC lookup function for POWER10 Frederic Barrat
@ 2022-03-10 16:17 ` Cédric Le Goater
0 siblings, 0 replies; 8+ messages in thread
From: Cédric Le Goater @ 2022-03-10 16:17 UTC (permalink / raw)
To: Frederic Barrat, danielhb413, qemu-ppc, qemu-devel
On 3/10/22 16:51, Frederic Barrat wrote:
> The PEC array used when looking for the PEC hosting a PHB is stored in
> the chip structure. The array is at a different offset in Pnv9Chip and
> Pnv10Chip. The lookup function was therefore not working properly on
> POWER10.
> This patch fixes it by introducing a class method to get the correct
> PEC pointer based on the chip object and PEC index.
>
> Fixes: 623575e16cd5 ("ppc/pnv: Add model for POWER10 PHB5 PCIe Host bridge")
> Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com>
> ---
> hw/pci-host/pnv_phb4.c | 5 ++---
> hw/ppc/pnv.c | 14 ++++++++++++++
> include/hw/ppc/pnv.h | 1 +
> 3 files changed, 17 insertions(+), 3 deletions(-)
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Queued for 7.0.
Thanks,
C.
> diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c
> index d1a911f988..4732633833 100644
> --- a/hw/pci-host/pnv_phb4.c
> +++ b/hw/pci-host/pnv_phb4.c
> @@ -1548,7 +1548,6 @@ static void pnv_phb4_instance_init(Object *obj)
> static PnvPhb4PecState *pnv_phb4_get_pec(PnvChip *chip, PnvPHB4 *phb,
> Error **errp)
> {
> - Pnv9Chip *chip9 = PNV9_CHIP(chip);
> int chip_id = phb->chip_id;
> int index = phb->phb_id;
> int i, j;
> @@ -1556,9 +1555,9 @@ static PnvPhb4PecState *pnv_phb4_get_pec(PnvChip *chip, PnvPHB4 *phb,
> for (i = 0; i < chip->num_pecs; i++) {
> /*
> * For each PEC, check the amount of phbs it supports
> - * and see if the given phb4 index matches an index.
> + * and see if the given phb index matches an index.
> */
> - PnvPhb4PecState *pec = &chip9->pecs[i];
> + PnvPhb4PecState *pec = PNV_CHIP_GET_CLASS(chip)->get_pec(chip, i);
>
> for (j = 0; j < pec->num_phbs; j++) {
> if (index == pnv_phb4_pec_get_phb_id(pec, j)) {
> diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
> index df58403a3a..3a676cd570 100644
> --- a/hw/ppc/pnv.c
> +++ b/hw/ppc/pnv.c
> @@ -1561,6 +1561,12 @@ static uint32_t pnv_chip_power9_xscom_pcba(PnvChip *chip, uint64_t addr)
> return addr >> 3;
> }
>
> +static PnvPhb4PecState *pnv_chip_power9_get_pec(PnvChip *chip, uint32_t index)
> +{
> + Pnv9Chip *chip9 = PNV9_CHIP(chip);
> + return &chip9->pecs[index];
> +}
> +
> static void pnv_chip_power9_class_init(ObjectClass *klass, void *data)
> {
> DeviceClass *dc = DEVICE_CLASS(klass);
> @@ -1580,6 +1586,7 @@ static void pnv_chip_power9_class_init(ObjectClass *klass, void *data)
> k->xscom_pcba = pnv_chip_power9_xscom_pcba;
> dc->desc = "PowerNV Chip POWER9";
> k->num_pecs = PNV9_CHIP_MAX_PEC;
> + k->get_pec = pnv_chip_power9_get_pec;
>
> device_class_set_parent_realize(dc, pnv_chip_power9_realize,
> &k->parent_realize);
> @@ -1769,6 +1776,12 @@ static uint32_t pnv_chip_power10_xscom_pcba(PnvChip *chip, uint64_t addr)
> return addr >> 3;
> }
>
> +static PnvPhb4PecState *pnv_chip_power10_get_pec(PnvChip *chip, uint32_t index)
> +{
> + Pnv10Chip *chip10 = PNV10_CHIP(chip);
> + return &chip10->pecs[index];
> +}
> +
> static void pnv_chip_power10_class_init(ObjectClass *klass, void *data)
> {
> DeviceClass *dc = DEVICE_CLASS(klass);
> @@ -1788,6 +1801,7 @@ static void pnv_chip_power10_class_init(ObjectClass *klass, void *data)
> k->xscom_pcba = pnv_chip_power10_xscom_pcba;
> dc->desc = "PowerNV Chip POWER10";
> k->num_pecs = PNV10_CHIP_MAX_PEC;
> + k->get_pec = pnv_chip_power10_get_pec;
>
> device_class_set_parent_realize(dc, pnv_chip_power10_realize,
> &k->parent_realize);
> diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h
> index 1e34ddd502..282f76ba08 100644
> --- a/include/hw/ppc/pnv.h
> +++ b/include/hw/ppc/pnv.h
> @@ -163,6 +163,7 @@ struct PnvChipClass {
> void (*pic_print_info)(PnvChip *chip, Monitor *mon);
> uint64_t (*xscom_core_base)(PnvChip *chip, uint32_t core_id);
> uint32_t (*xscom_pcba)(PnvChip *chip, uint64_t addr);
> + PnvPhb4PecState *(*get_pec)(PnvChip *chip, uint32_t index);
> };
>
> #define PNV_CHIP_TYPE_SUFFIX "-" TYPE_PNV_CHIP
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 0/3] Fix user-created PHB devices on POWER10
2022-03-10 15:50 [PATCH 0/3] Fix user-created PHB devices on POWER10 Frederic Barrat
` (2 preceding siblings ...)
2022-03-10 15:51 ` [PATCH 3/3] ppc/pnv: Fix PEC lookup function for POWER10 Frederic Barrat
@ 2022-03-14 15:21 ` Cédric Le Goater
3 siblings, 0 replies; 8+ messages in thread
From: Cédric Le Goater @ 2022-03-14 15:21 UTC (permalink / raw)
To: Frederic Barrat, danielhb413, qemu-ppc, qemu-devel
On 3/10/22 16:50, Frederic Barrat wrote:
> A short series to fix creating PHB devices and root ports on the newly
> merged powernv10 machine.
>
>
> Frederic Barrat (3):
> ppc/pnv: Introduce a pnv-phb5 device to match root port
> ppc/pnv: Fixes for user-created pnv-phb5 devices
> ppc/pnv: Fix PEC lookup function for POWER10
>
> hw/pci-host/pnv_phb4.c | 12 +++++++++---
> hw/pci-host/pnv_phb4_pec.c | 9 +++++----
> hw/ppc/pnv.c | 20 +++++++++++++++++---
> include/hw/pci-host/pnv_phb4.h | 5 +++++
> include/hw/ppc/pnv.h | 1 +
> 5 files changed, 37 insertions(+), 10 deletions(-)
>
Queued for patch 1 and 2 (with changes) for 7.0
Thanks,
C.
^ permalink raw reply [flat|nested] 8+ messages in thread