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([2a01:e0a:f0e:9070:527b:9dff:feef:3874]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-45dda597641sm6868365e9.11.2025.09.05.03.18.00 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 05 Sep 2025 03:18:01 -0700 (PDT) Message-ID: Date: Fri, 5 Sep 2025 12:17:59 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC PATCH v3 05/15] hw/arm/smmuv3-accel: Introduce smmuv3 accel device Content-Language: en-US To: Shameer Kolothum , Nicolin Chen Cc: "qemu-arm@nongnu.org" , "qemu-devel@nongnu.org" , "peter.maydell@linaro.org" , Jason Gunthorpe , "ddutile@redhat.com" , "berrange@redhat.com" , Nathan Chen , Matt Ochs , "smostafa@google.com" , "linuxarm@huawei.com" , "wangzhou1@hisilicon.com" , "jiangkunkun@huawei.com" , "jonathan.cameron@huawei.com" , "zhangfei.gao@linaro.org" , "zhenzhong.duan@intel.com" , "shameerkolothum@gmail.com" , =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= References: <20250714155941.22176-1-shameerali.kolothum.thodi@huawei.com> <20250714155941.22176-6-shameerali.kolothum.thodi@huawei.com> From: Eric Auger In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=170.10.129.124; envelope-from=eric.auger@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: eric.auger@redhat.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 9/5/25 10:22 AM, Shameer Kolothum wrote: > >> -----Original Message----- >> From: Eric Auger >> Sent: 04 September 2025 15:33 >> To: Nicolin Chen ; Shameer Kolothum >> >> Cc: qemu-arm@nongnu.org; qemu-devel@nongnu.org; >> peter.maydell@linaro.org; Jason Gunthorpe ; >> ddutile@redhat.com; berrange@redhat.com; Nathan Chen >> ; Matt Ochs ; >> smostafa@google.com; linuxarm@huawei.com; wangzhou1@hisilicon.com; >> jiangkunkun@huawei.com; jonathan.cameron@huawei.com; >> zhangfei.gao@linaro.org; zhenzhong.duan@intel.com; >> shameerkolothum@gmail.com >> Subject: Re: [RFC PATCH v3 05/15] hw/arm/smmuv3-accel: Introduce smmuv3 >> accel device >> >> External email: Use caution opening links or attachments >> >> >> On 7/14/25 7:23 PM, Nicolin Chen wrote: >>> On Mon, Jul 14, 2025 at 04:59:31PM +0100, Shameer Kolothum wrote: >>>> Also setup specific PCIIOMMUOps for accel SMMUv3 as accel >>>> SMMUv3 will have different handling for those ops callbacks in >>>> subsequent patches. >>>> >>>> The "accel" property is not yet added, so users cannot set it at this >>>> point. It will be introduced in a subsequent patch once the necessary >>>> support is in place. >>>> >>>> Signed-off-by: Shameer Kolothum >>>> >>> Overall the patch looks good to me, >>> Reviewed-by: Nicolin Chen >>> >>> with some nits: >>> >>>> @@ -61,7 +61,8 @@ arm_common_ss.add(when: 'CONFIG_ARMSSE', >> if_true: >>>> files('armsse.c')) >>>> arm_common_ss.add(when: 'CONFIG_FSL_IMX7', if_true: >>>> files('fsl-imx7.c', 'mcimx7d-sabre.c')) >>>> arm_common_ss.add(when: 'CONFIG_FSL_IMX8MP', if_true: >>>> files('fsl-imx8mp.c')) >>>> arm_common_ss.add(when: 'CONFIG_FSL_IMX8MP_EVK', if_true: >>>> files('imx8mp-evk.c')) >>>> -arm_common_ss.add(when: 'CONFIG_ARM_SMMUV3', if_true: >>>> files('smmuv3.c')) >>>> +arm_ss.add(when: 'CONFIG_ARM_SMMUV3', if_true: files('smmuv3.c')) >>>> +arm_ss.add(when: ['CONFIG_ARM_SMMUV3', 'CONFIG_IOMMUFD'], >> if_true: >>>> +files('smmuv3-accel.c')) >>> Wondering why "arm_common_ss" is changed to "arm_ss"? >> Indeed why did you need to change that? > Thanks for going through the series. I will go through all the comments and > rework the series soon, but a quick one on the above question. > > I was getting this compile error as now we use #include CONFIG_DEVICES to check > CONFIG_IOMMUFD > > .d -o libsystem_arm.a.p/hw_arm_smmuv3.c.o -c ../hw/arm/smmuv3.c > In file included from ../hw/arm/smmuv3.c:35: > ../hw/arm/smmuv3-accel.h:17:10: error: #include expects "FILENAME" or > 17 | #include CONFIG_DEVICES > | ^~~~~~~~~~~~~~ > ../hw/arm/smmuv3-accel.h:55:13: error: attempt to use poisoned "CONFIG_ARM_SMMUV3" > 55 | #if defined(CONFIG_ARM_SMMUV3) && defined(CONFIG_IOMMUFD) > | ^ > ../hw/arm/smmuv3-accel.h:55:43: error: attempt to use poisoned "CONFIG_IOMMUFD" > 55 | #if defined(CONFIG_ARM_SMMUV3) && defined(CONFIG_IOMMUFD) > | ^ > ninja: build stopped: subcommand failed. > make[1]: *** [Makefile:168: run-ninja] Error 1 > make[1]: Leaving directory '/root/qemu-hisi/build' > > And with arm_common_ss.add, it looks like the compiler is missing > '-DCONFIG_DEVICES="aarch64-softmmu-config-devices.h"'. I guess this is because devices are arch specific so it cannot be "common" anymore. Looks sensible to me. Adding Philippe in the loop. Unrelated to that, do you have a way to opt-out SMMUv3 HW acceleration. Some people might not be interested in that feature. Eric > > Not sure how to fix this with arm_common_ss.add. Please let me know > If there is a way to address this. > > Thanks, > Shameer > > >