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[176.184.32.47]) by smtp.gmail.com with ESMTPSA id m14-20020a170906580e00b00a28aa4871c7sm1388316ejq.205.2024.01.09.13.07.09 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 09 Jan 2024 13:07:11 -0800 (PST) Message-ID: Date: Tue, 9 Jan 2024 22:07:07 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 00/33] hw/cpu/arm: Remove one use of qemu_get_cpu() in A7/A15 MPCore priv Content-Language: en-US To: =?UTF-8?Q?C=C3=A9dric_Le_Goater?= , Fabiano Rosas , qemu-devel@nongnu.org, Juan Quintela Cc: Paolo Bonzini , Tyrone Ting , =?UTF-8?Q?Alex_Benn=C3=A9e?= , Manos Pitsidianakis , Eduardo Habkost , Joel Stanley , Alistair Francis , Anton Johansson , Andrey Smirnov , Peter Maydell , Hao Wu , Jean-Christophe Dubois , Igor Mitsyanko , "Edgar E. Iglesias" , Andrew Jeffery , Rob Herring , qemu-arm@nongnu.org, Mark Cave-Ayland , Peter Xu References: <20231212162935.42910-1-philmd@linaro.org> <03b969d3-1947-4186-b3ee-15e3cddc5f34@kaod.org> <18a38b88-8f20-420c-9916-a03d1b4930a7@linaro.org> <38cfa9de-874b-41dd-873e-5ad1f5a5805e@kaod.org> <87y1d6i47m.fsf@suse.de> <597186d9-af21-46e8-8075-f21d36c01c07@kaod.org> <87plya76cu.fsf@suse.de> From: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::62c; envelope-from=philmd@linaro.org; helo=mail-ej1-x62c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Hi Cédric, On 9/1/24 19:06, Cédric Le Goater wrote: > On 1/9/24 18:40, Fabiano Rosas wrote: >> Cédric Le Goater writes: >> >>> On 1/3/24 20:53, Fabiano Rosas wrote: >>>> Philippe Mathieu-Daudé writes: >>>> >>>>> +Peter/Fabiano >>>>> >>>>> On 2/1/24 17:41, Cédric Le Goater wrote: >>>>>> On 1/2/24 17:15, Philippe Mathieu-Daudé wrote: >>>>>>> Hi Cédric, >>>>>>> >>>>>>> On 2/1/24 15:55, Cédric Le Goater wrote: >>>>>>>> On 12/12/23 17:29, Philippe Mathieu-Daudé wrote: >>>>>>>>> Hi, >>>>>>>>> >>>>>>>>> When a MPCore cluster is used, the Cortex-A cores belong the the >>>>>>>>> cluster container, not to the board/soc layer. This series move >>>>>>>>> the creation of vCPUs to the MPCore private container. >>>>>>>>> >>>>>>>>> Doing so we consolidate the QOM model, moving common code in a >>>>>>>>> central place (abstract MPCore parent). >>>>>>>> >>>>>>>> Changing the QOM hierarchy has an impact on the state of the >>>>>>>> machine >>>>>>>> and some fixups are then required to maintain migration >>>>>>>> compatibility. >>>>>>>> This can become a real headache for KVM machines like virt for >>>>>>>> which >>>>>>>> migration compatibility is a feature, less for emulated ones. >>>>>>> >>>>>>> All changes are either moving properties (which are not migrated) >>>>>>> or moving non-migrated QOM members (i.e. pointers of ARMCPU, which >>>>>>> is still migrated elsewhere). So I don't see any obvious migration >>>>>>> problem, but I might be missing something, so I Cc'ed Juan :> >>>> >>>> FWIW, I didn't spot anything problematic either. >>>> >>>> I've ran this through my migration compatibility series [1] and it >>>> doesn't regress aarch64 migration from/to 8.2. The tests use '-M >>>> virt -cpu max', so the cortex-a7 and cortex-a15 are not covered. I >>>> don't >>>> think we even support migration of anything non-KVM on arm. >>> >>> it happens we do. >>> >> >> Oh, sorry, I didn't mean TCG here. Probably meant to say something like >> non-KVM-capable cpus, as in 32-bit. Nevermind. > > Theoretically, we should be able to migrate to a TCG guest. Well, this > worked in the past for PPC. When I was doing more KVM related changes, > this was very useful for dev. Also, some machines are partially emulated. > Anyhow I agree this is not a strong requirement and we often break it. > Let's focus on KVM only. No no, we want the same for TCG. >>>> 1- https://gitlab.com/farosas/qemu/-/jobs/5853599533 >>> >>> yes it depends on the QOM hierarchy and virt seems immune to the >>> changes. >>> Good. >>> >>> However, changing the QOM topology clearly breaks migration compat, >> >> Well, "clearly" is relative =) You've mentioned pseries and aspeed >> already, do you have a pointer to one of those cases were we broke >> migration > > Regarding pseries, migration compat broke because of 5bc8d26de20c > ("spapr: allocate the ICPState object from under sPAPRCPUCore") which > is similar to the changes proposed by this series, it impacts the QOM > hierarchy. Here is the workaround/fix from Greg : 46f7afa37096 > ("spapr: fix migration of ICPState objects from/to older QEMU") which > is quite an headache and this turned out to raise another problem some > months ago ... :/ That's why I sent [1] to prepare removal of old > machines and workarounds becoming a burden. > > Regarding aspeed, this series breaks compat. Can you write down the steps to reproduce please? I'll debug it. We need to understand this. > Not that we care much > but ​this caught my attention because of my past experience on pseries. > Same kind of QOM change which could impact other machines, like virt. > Since you checked that migration compat is preserved on virt, we should > be fine. > > Thanks, > > C. > > [1] > https://lore.kernel.org/qemu-devel/20231214181723.1520854-1-clg@kaod.org/ >