From: Thomas Huth <thuth@redhat.com>
To: Ninad Palsule <ninad@linux.ibm.com>,
qemu-devel@nongnu.org, clg@kaod.org, peter.maydell@linaro.org,
andrew@aj.id.au, joel@jms.id.au, pbonzini@redhat.com,
marcandre.lureau@redhat.com, berrange@redhat.com,
philmd@linaro.org
Cc: qemu-arm@nongnu.org
Subject: Re: [PATCH v1 3/7] hw/fsi: Introduce IBM's cfam,fsi-slave
Date: Mon, 28 Aug 2023 08:03:05 +0200 [thread overview]
Message-ID: <e2a8e6eb-b9fd-8011-32c0-e5c310bf1135@redhat.com> (raw)
In-Reply-To: <20230825203046.3692467-4-ninad@linux.ibm.com>
On 25/08/2023 22.30, Ninad Palsule wrote:
> This is a part of patchset where IBM's Flexible Service Interface is
> introduced.
>
> The Common FRU Access Macro (CFAM), an address space containing
> various "engines" that drive accesses on busses internal and external
> to the POWER chip. Examples include the SBEFIFO and I2C masters. The
> engines hang off of an internal Local Bus (LBUS) which is described
> by the CFAM configuration block.
>
> The FSI slave: The slave is the terminal point of the FSI bus for
> FSI symbols addressed to it. Slaves can be cascaded off of one
> another. The slave's configuration registers appear in address space
> of the CFAM to which it is attached.
>
> Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
> Signed-off-by: Cédric Le Goater <clg@kaod.org>
> Signed-off-by: Ninad Palsule <ninad@linux.ibm.com>
> ---
...
> diff --git a/hw/fsi/cfam.c b/hw/fsi/cfam.c
> new file mode 100644
> index 0000000000..19256050bd
> --- /dev/null
> +++ b/hw/fsi/cfam.c
> @@ -0,0 +1,235 @@
> +/*
> + * SPDX-License-Identifier: GPL-2.0-or-later
> + * Copyright (C) 2023 IBM Corp.
> + *
> + * IBM Common FRU Access Macro
> + */
> +
> +#include "qemu/osdep.h"
> +
> +#include "qapi/error.h"
> +#include "qemu/log.h"
> +
> +#include "hw/fsi/bits.h"
> +#include "hw/fsi/cfam.h"
> +#include "hw/fsi/engine-scratchpad.h"
> +
> +#include "hw/qdev-properties.h"
> +
> +#define TO_REG(x) ((x) >> 2)
> +
> +#define CFAM_ENGINE_CONFIG TO_REG(0x04)
> +
> +#define CFAM_CONFIG_CHIP_ID TO_REG(0x00)
> +#define CFAM_CONFIG_CHIP_ID_P9 0xc0022d15
> +#define CFAM_CONFIG_CHIP_ID_BREAK 0xc0de0000
> +
> +static uint64_t cfam_config_read(void *opaque, hwaddr addr, unsigned size)
> +{
> + CFAMConfig *config;
> + CFAMState *cfam;
> + LBusNode *node;
> + int i;
> +
> + config = CFAM_CONFIG(opaque);
> + cfam = container_of(config, CFAMState, config);
> +
> + qemu_log_mask(LOG_UNIMP, "%s: read @0x%" HWADDR_PRIx " size=%d\n",
> + __func__, addr, size);
> +
> + assert(size == 4);
> + assert(!(addr & 3));
> +
> + switch (addr) {
> + case 0x00:
> + return CFAM_CONFIG_CHIP_ID_P9;
> + case 0x04:
> + return ENGINE_CONFIG_NEXT
> + | 0x00010000 /* slots */
> + | 0x00001000 /* version */
> + | ENGINE_CONFIG_TYPE_PEEK /* type */
> + | 0x0000000c; /* crc */
> + case 0x08:
> + return ENGINE_CONFIG_NEXT
> + | 0x00010000 /* slots */
> + | 0x00005000 /* version */
> + | ENGINE_CONFIG_TYPE_FSI /* type */
> + | 0x0000000a; /* crc */
> + break;
> + default:
> + /* FIXME: Improve this */
> + i = 0xc;
> + QLIST_FOREACH(node, &cfam->lbus.devices, next) {
> + if (i == addr) {
> + return LBUS_DEVICE_GET_CLASS(node->ldev)->config;
> + }
> + i += size;
> + }
> +
> + if (i == addr) {
> + return 0;
> + }
> +
> + return 0xc0de0000;
Can you explain the magic number at least with a comment?
Maybe it would also make sense to add a qemu_log_mask(LOG_GUEST_ERROR, ...)
or qemu_log_mask(LOG_UNIMP, ...) statement here?
Thomas
next prev parent reply other threads:[~2023-08-28 6:04 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-25 20:30 [PATCH v1 0/7] Introduce model for IBM's FSP Ninad Palsule
2023-08-25 20:30 ` [PATCH v1 1/7] hw/fsi: Introduce IBM's Local bus Ninad Palsule
2023-08-28 8:34 ` Joel Stanley
2023-08-28 22:55 ` Ninad Palsule
2023-08-25 20:30 ` [PATCH v1 2/7] hw/fsi: Introduce IBM's scratchpad Ninad Palsule
2023-08-28 5:52 ` Thomas Huth
2023-08-29 13:21 ` Ninad Palsule
2023-08-25 20:30 ` [PATCH v1 3/7] hw/fsi: Introduce IBM's cfam,fsi-slave Ninad Palsule
2023-08-28 6:03 ` Thomas Huth [this message]
2023-08-29 13:39 ` Ninad Palsule
2023-08-29 13:43 ` Cédric Le Goater
2023-08-30 2:31 ` Ninad Palsule
2023-08-25 20:30 ` [PATCH v1 4/7] hw/fsi: Introduce IBM's FSI Ninad Palsule
2023-08-28 8:57 ` Joel Stanley
2023-08-28 22:58 ` Ninad Palsule
2023-08-25 20:30 ` [PATCH v1 5/7] hw/fsi: IBM's On-chip Peripheral Bus Ninad Palsule
2023-08-28 8:59 ` Joel Stanley
2023-08-28 22:58 ` Ninad Palsule
2023-08-25 20:30 ` [PATCH v1 6/7] hw/fsi: Aspeed APB2OPB interface Ninad Palsule
2023-08-28 8:55 ` Joel Stanley
2023-08-28 22:57 ` Ninad Palsule
2023-08-25 20:30 ` [PATCH v1 7/7] hw/arm: Hook up FSI module in AST2600 Ninad Palsule
2023-08-28 8:48 ` Joel Stanley
2023-08-28 22:56 ` Ninad Palsule
2023-08-28 8:25 ` [PATCH v1 0/7] Introduce model for IBM's FSP Joel Stanley
2023-08-28 21:13 ` Ninad Palsule
2023-08-28 8:49 ` Cédric Le Goater
2023-08-30 2:30 ` Ninad Palsule
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