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Mon, 22 Sep 2025 07:29:48 -0700 (PDT) Received: from [192.168.0.4] ([71.212.157.132]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-269800531c6sm135442465ad.14.2025.09.22.07.29.47 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 22 Sep 2025 07:29:47 -0700 (PDT) Message-ID: Date: Mon, 22 Sep 2025 07:29:46 -0700 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 3/5] target/loongarch: Set file tcg_cpu.c separate from cpu.c To: Bibo Mao , Song Gao Cc: Jiaxun Yang , qemu-devel@nongnu.org References: <20250922073400.1308169-1-maobibo@loongson.cn> <20250922073400.1308169-4-maobibo@loongson.cn> From: Richard Henderson Content-Language: en-US In-Reply-To: <20250922073400.1308169-4-maobibo@loongson.cn> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::529; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x529.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 9/22/25 00:33, Bibo Mao wrote: > Remove inline included with file tcg_cpu.c, and set it separate > with file target/loongarch/cpu.c > > Signed-off-by: Bibo Mao > --- > target/loongarch/cpu.c | 9 --------- > target/loongarch/tcg/meson.build | 1 + > target/loongarch/tcg/tcg_cpu.c | 13 ++++++++++++- > target/loongarch/tcg/tcg_loongarch.h | 1 + > 4 files changed, 14 insertions(+), 10 deletions(-) I think this should be squashed with patch 1. The intermediate #include of tcg/tcg_cpu.c was odd. With that, Reviewed-by: Richard Henderson r~ > > diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c > index 6eb8c3214a..b449ede56d 100644 > --- a/target/loongarch/cpu.c > +++ b/target/loongarch/cpu.c > @@ -28,11 +28,6 @@ > #ifdef CONFIG_KVM > #include > #endif > -#ifdef CONFIG_TCG > -#include "accel/tcg/cpu-ldst.h" > -#include "accel/tcg/cpu-ops.h" > -#include "tcg/tcg.h" > -#endif > #include "tcg/tcg_loongarch.h" > > const char * const regnames[32] = { > @@ -653,10 +648,6 @@ static void loongarch_cpu_dump_state(CPUState *cs, FILE *f, int flags) > } > } > > -#ifdef CONFIG_TCG > -#include "tcg/tcg_cpu.c" > -#endif /* CONFIG_TCG */ > - > #ifndef CONFIG_USER_ONLY > #include "hw/core/sysemu-cpu-ops.h" > > diff --git a/target/loongarch/tcg/meson.build b/target/loongarch/tcg/meson.build > index bdf34f9673..b7adfe46f1 100644 > --- a/target/loongarch/tcg/meson.build > +++ b/target/loongarch/tcg/meson.build > @@ -7,6 +7,7 @@ loongarch_ss.add([zlib, gen]) > loongarch_ss.add(files( > 'fpu_helper.c', > 'op_helper.c', > + 'tcg_cpu.c', > 'translate.c', > 'vec_helper.c', > )) > diff --git a/target/loongarch/tcg/tcg_cpu.c b/target/loongarch/tcg/tcg_cpu.c > index f09a695968..c7f49838e3 100644 > --- a/target/loongarch/tcg/tcg_cpu.c > +++ b/target/loongarch/tcg/tcg_cpu.c > @@ -4,6 +4,17 @@ > * > * Copyright (c) 2025 Loongson Technology Corporation Limited > */ > +#include "qemu/osdep.h" > +#include "qemu/accel.h" > +#include "qemu/error-report.h" > +#include "qemu/log.h" > +#include "accel/accel-cpu-target.h" > +#include "accel/tcg/cpu-ldst.h" > +#include "accel/tcg/cpu-ops.h" > +#include "exec/translation-block.h" > +#include "exec/target_page.h" > +#include "tcg_loongarch.h" > +#include "internals.h" > > #ifndef CONFIG_USER_ONLY > static void loongarch_cpu_do_interrupt(CPUState *cs) > @@ -232,7 +243,7 @@ static int loongarch_cpu_mmu_index(CPUState *cs, bool ifetch) > return MMU_DA_IDX; > } > > -static const TCGCPUOps loongarch_tcg_ops = { > +const TCGCPUOps loongarch_tcg_ops = { > .guest_default_memory_order = 0, > .mttcg_supported = true, > > diff --git a/target/loongarch/tcg/tcg_loongarch.h b/target/loongarch/tcg/tcg_loongarch.h > index 47702893e3..7fb627f2d6 100644 > --- a/target/loongarch/tcg/tcg_loongarch.h > +++ b/target/loongarch/tcg/tcg_loongarch.h > @@ -9,6 +9,7 @@ > #include "cpu.h" > #include "cpu-mmu.h" > > +extern const TCGCPUOps loongarch_tcg_ops; > void loongarch_csr_translate_init(void); > > bool loongarch_cpu_tlb_fill(CPUState *cs, vaddr address, int size,