From: Xiaoyao Li <xiaoyao.li@intel.com>
To: Eduardo Habkost <ehabkost@redhat.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>,
"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>,
Chao Peng <chao.p.peng@linux.intel.com>
Subject: Live migration regarding Intel PT
Date: Wed, 25 Aug 2021 14:59:37 +0800 [thread overview]
Message-ID: <e31344c9-e9e6-7d78-3a53-2c0e5e5f39d7@intel.com> (raw)
Hi Eduardo,
I have some question regrading Intel PT live migration.
Commit "e37a5c7fa459 (i386: Add Intel Processor Trace feature support)"
expose Intel PT with a fixed capabilities of CPUID 0x14 for live
migration. And the fixed capabilities are the value reported on
ICX(IceLake). However, the upcoming SPR(Sapphire Rapids) has less
capabilities of INTEL_PT_CYCLE_BITMAP than ICX. It fails to enable PT in
guest on SPR machine.
If change the check on INTEL_PT_CYCLE_BITMAP to allow different value to
allow it work on SPR. I think it breaks live migration, right?
For me, not making each sub-function of PT as configurable in QEMU
indeed makes it hard for live migration. Why not make PT as unmigratable
in the first place when introducing the support in QEMU?
Thanks,
-Xiaoyao
next reply other threads:[~2021-08-25 7:00 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-25 6:59 Xiaoyao Li [this message]
2021-08-25 20:48 ` Live migration regarding Intel PT Eduardo Habkost
2021-08-26 2:16 ` Xiaoyao Li
2021-08-26 15:14 ` Eduardo Habkost
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