From: Wilfred Mallawa <wilfred.mallawa@wdc.com>
To: "bmeng.cn@gmail.com" <bmeng.cn@gmail.com>,
"alistair.francis@opensource.wdc.com"
<alistair.francis@opensource.wdc.com>
Cc: "palmer@dabbelt.com" <palmer@dabbelt.com>,
Alistair Francis <Alistair.Francis@wdc.com>,
"qemu-riscv@nongnu.org" <qemu-riscv@nongnu.org>,
"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>,
"alistair23@gmail.com" <alistair23@gmail.com>
Subject: Re: [PATCH 1/2] riscv: opentitan: fixup plic stride len
Date: Mon, 10 Jan 2022 23:24:18 +0000 [thread overview]
Message-ID: <e33362fcff50de117ded3470a6112cc718183b91.camel@wdc.com> (raw)
In-Reply-To: <CAEUhbmVjdMfF5G-xbjBCFWE13PGtVG9WveXfDSyAAO3Q0Fpukw@mail.gmail.com>
On Mon, 2022-01-10 at 15:34 +0800, Bin Meng wrote:
> CAUTION: This email originated from outside of Western Digital. Do
> not click on links or open attachments unless you recognize the
> sender and know that the content is safe.
>
>
> On Mon, Jan 10, 2022 at 2:13 PM Alistair Francis
> <alistair.francis@opensource.wdc.com> wrote:
> >
> > From: Wilfred Mallawa <wilfred.mallawa@wdc.com>
> >
> > The following change was made to rectify incorrectly set stride
> > length
> > on the PLIC. Where it should be 32bit and not 24bit (0x18). This
> > was
>
> PLIC [1]
Thanks, will add this in.
>
> > discovered whilst attempting to fix a bug where a timer_interrupt
> > was
> > not serviced on TockOS-OpenTitan.
> >
>
> [1]
> https://docs.opentitan.org/hw/top_earlgrey/ip_autogen/rv_plic/doc/
>
> > Signed-off-by: Wilfred Mallawa <wilfred.mallawa@wdc.com>
> > ---
> > hw/riscv/opentitan.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
>
> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
prev parent reply other threads:[~2022-01-10 23:26 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-10 6:13 [PATCH 1/2] riscv: opentitan: fixup plic stride len Alistair Francis
2022-01-10 6:13 ` [PATCH 2/2] hw: timer: ibex_timer: update/add reg address Alistair Francis
2022-01-10 6:16 ` Alistair Francis
2022-01-10 7:40 ` Bin Meng
2022-01-10 6:15 ` [PATCH 1/2] riscv: opentitan: fixup plic stride len Alistair Francis
2022-01-10 7:34 ` Bin Meng
2022-01-10 23:24 ` Wilfred Mallawa [this message]
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