qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Richard Henderson <richard.henderson@linaro.org>
To: gaosong <gaosong@loongson.cn>, qemu-devel@nongnu.org
Cc: maobibo@loongson.cn
Subject: Re: [PATCH RESEND v5 51/57] target/loongarch: Implement xvinsgr2vr xvpickve2gr
Date: Tue, 12 Sep 2023 09:20:42 -0700	[thread overview]
Message-ID: <e3405db6-8670-a764-e584-feb2dca9437c@linaro.org> (raw)
In-Reply-To: <1eabb2c6-510e-76c9-62b2-7bac8213f693@loongson.cn>

On 9/12/23 02:09, gaosong wrote:
> static bool gen_g2v_vl(DisasContext *ctx, arg_vr_i *a, uint32_t oprsz, MemOp mop,
>                         void (*func)(TCGv, TCGv_ptr, tcg_target_long))
> {
>      TCGv src = gpr_src(ctx, a->rj, EXT_NONE);
> 
>      if (!check_vec(ctx, oprsz)) {
>          return true;
>      }
> 
>      func(src, cpu_env, vec_reg_offset(a->vd, a->imm, mop));
> 
>      return true;
> }
> 
> static bool gen_g2v(DisasContext *ctx, arg_vr_i *a, MemOp mop,
>                      void (*func)(TCGv, TCGv_ptr, tcg_target_long))
> {
>      return gen_g2v_vl(ctx, a, 16, mop, func);
> }
> 
> static bool gen_g2x(DisasContext *ctx, arg_vr_i *a, MemOp mop,
>                      void (*func)(TCGv, TCGv_ptr, tcg_target_long))
> {
>      return gen_g2v_vl(ctx, a, 32, mop, func);
> }
> 
> TRANS(vinsgr2vr_b, LSX, gen_g2v, MO_8, tcg_gen_st8_i64)
> TRANS(vinsgr2vr_h, LSX, gen_g2v, MO_16, tcg_gen_st16_i64)
> TRANS(vinsgr2vr_w, LSX, gen_g2v, MO_32, tcg_gen_st32_i64)
> TRANS(vinsgr2vr_d, LSX, gen_g2v, MO_64, tcg_gen_st_i64)
> TRANS(xvinsgr2vr_w, LASX, gen_g2x, MO_32, tcg_gen_st32_i64)
> TRANS(xvinsgr2vr_d, LASX, gen_g2x, MO_64, tcg_gen_st_i64)

Looks perfect, thanks.


r~


  reply	other threads:[~2023-09-12 16:21 UTC|newest]

Thread overview: 87+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-09-07  8:31 [PATCH RESEND v5 00/57] Add LoongArch LASX instructions Song Gao
2023-09-07  8:31 ` [PATCH RESEND v5 01/57] target/loongarch: Renamed lsx*.c to vec* .c Song Gao
2023-09-07 16:37   ` Richard Henderson
2023-09-07  8:31 ` [PATCH RESEND v5 02/57] target/loongarch: Implement gvec_*_vl functions Song Gao
2023-09-07 17:19   ` Richard Henderson
2023-09-08  3:21     ` gaosong
2023-09-07  8:31 ` [PATCH RESEND v5 03/57] target/loongarch: Use gen_helper_gvec_4_ptr for 4OP + env vector instructions Song Gao
2023-09-07 17:34   ` Richard Henderson
2023-09-08  3:22     ` gaosong
2023-09-07  8:31 ` [PATCH RESEND v5 04/57] target/loongarch: Use gen_helper_gvec_4 for 4OP " Song Gao
2023-09-10  0:47   ` Richard Henderson
2023-09-07  8:31 ` [PATCH RESEND v5 05/57] target/loongarch: Use gen_helper_gvec_3_ptr for 3OP + env " Song Gao
2023-09-10  0:51   ` Richard Henderson
2023-09-07  8:31 ` [PATCH RESEND v5 06/57] target/loongarch: Use gen_helper_gvec_3 for 3OP " Song Gao
2023-09-07  8:31 ` [PATCH RESEND v5 07/57] target/loongarch: Use gen_helper_gvec_2_ptr for 2OP + env " Song Gao
2023-09-10  0:59   ` Richard Henderson
2023-09-07  8:31 ` [PATCH RESEND v5 08/57] target/loongarch: Use gen_helper_gvec_2 for 2OP " Song Gao
2023-09-10  1:01   ` Richard Henderson
2023-09-07  8:31 ` [PATCH RESEND v5 09/57] target/loongarch: Use gen_helper_gvec_2i for 2OP + imm " Song Gao
2023-09-10  1:03   ` Richard Henderson
2023-09-07  8:31 ` [PATCH RESEND v5 10/57] target/loongarch: Replace CHECK_SXE to check_vec(ctx, 16) Song Gao
2023-09-10  1:04   ` Richard Henderson
2023-09-07  8:31 ` [PATCH RESEND v5 11/57] target/loongarch: Add LASX data support Song Gao
2023-09-07  8:31 ` [PATCH RESEND v5 12/57] target/loongarch: check_vec support check LASX instructions Song Gao
2023-09-07  8:31 ` [PATCH RESEND v5 13/57] target/loongarch: Add avail_LASX to " Song Gao
2023-09-07  8:31 ` [PATCH RESEND v5 14/57] target/loongarch: Implement xvadd/xvsub Song Gao
2023-09-07 12:13   ` gaosong
2023-09-10  1:44   ` Richard Henderson
2023-09-11 12:27     ` gaosong
2023-09-07  8:31 ` [PATCH RESEND v5 15/57] target/loongarch: Implement xvreplgr2vr Song Gao
2023-09-10  1:46   ` Richard Henderson
2023-09-07  8:31 ` [PATCH RESEND v5 16/57] target/loongarch: Implement xvaddi/xvsubi Song Gao
2023-09-10  1:50   ` Richard Henderson
2023-09-07  8:31 ` [PATCH RESEND v5 17/57] target/loongarch: Implement xvneg Song Gao
2023-09-10  1:51   ` Richard Henderson
2023-09-07  8:31 ` [PATCH RESEND v5 18/57] target/loongarch: Implement xvsadd/xvssub Song Gao
2023-09-07  8:31 ` [PATCH RESEND v5 19/57] target/loongarch: Implement xvhaddw/xvhsubw Song Gao
2023-09-11 21:20   ` Richard Henderson
2023-09-07  8:31 ` [PATCH RESEND v5 20/57] target/loongarch: Implement xvaddw/xvsubw Song Gao
2023-09-11 21:25   ` Richard Henderson
2023-09-07  8:31 ` [PATCH RESEND v5 21/57] target/loongarch: Implement xavg/xvagr Song Gao
2023-09-11 21:27   ` Richard Henderson
2023-09-07  8:31 ` [PATCH RESEND v5 22/57] target/loongarch: Implement xvabsd Song Gao
2023-09-07  8:31 ` [PATCH RESEND v5 23/57] target/loongarch: Implement xvadda Song Gao
2023-09-07  8:31 ` [PATCH RESEND v5 24/57] target/loongarch: Implement xvmax/xvmin Song Gao
2023-09-07  8:31 ` [PATCH RESEND v5 25/57] target/loongarch: Implement xvmul/xvmuh/xvmulw{ev/od} Song Gao
2023-09-07  8:31 ` [PATCH RESEND v5 26/57] target/loongarch: Implement xvmadd/xvmsub/xvmaddw{ev/od} Song Gao
2023-09-07  8:31 ` [PATCH RESEND v5 27/57] target/loongarch; Implement xvdiv/xvmod Song Gao
2023-09-07  8:31 ` [PATCH RESEND v5 28/57] target/loongarch: Implement xvsat Song Gao
2023-09-07  8:31 ` [PATCH RESEND v5 29/57] target/loongarch: Implement xvexth Song Gao
2023-09-07  8:31 ` [PATCH RESEND v5 30/57] target/loongarch: Implement vext2xv Song Gao
2023-09-07  8:31 ` [PATCH RESEND v5 31/57] target/loongarch: Implement xvsigncov Song Gao
2023-09-07  8:31 ` [PATCH RESEND v5 32/57] target/loongarch: Implement xvmskltz/xvmskgez/xvmsknz Song Gao
2023-09-07  8:31 ` [PATCH RESEND v5 33/57] target/loognarch: Implement xvldi Song Gao
2023-09-07  8:31 ` [PATCH RESEND v5 34/57] target/loongarch: Implement LASX logic instructions Song Gao
2023-09-07  8:31 ` [PATCH RESEND v5 35/57] target/loongarch: Implement xvsll xvsrl xvsra xvrotr Song Gao
2023-09-07  8:31 ` [PATCH RESEND v5 36/57] target/loongarch: Implement xvsllwil xvextl Song Gao
2023-09-07  8:31 ` [PATCH RESEND v5 37/57] target/loongarch: Implement xvsrlr xvsrar Song Gao
2023-09-07  8:31 ` [PATCH RESEND v5 38/57] target/loongarch: Implement xvsrln xvsran Song Gao
2023-09-07  8:31 ` [PATCH RESEND v5 39/57] target/loongarch: Implement xvsrlrn xvsrarn Song Gao
2023-09-07  8:31 ` [PATCH RESEND v5 40/57] target/loongarch: Implement xvssrln xvssran Song Gao
2023-09-11 22:07   ` Richard Henderson
2023-09-07  8:31 ` [PATCH RESEND v5 41/57] target/loongarch: Implement xvssrlrn xvssrarn Song Gao
2023-09-11 22:13   ` Richard Henderson
2023-09-07  8:31 ` [PATCH RESEND v5 42/57] target/loongarch: Implement xvclo xvclz Song Gao
2023-09-07  8:31 ` [PATCH RESEND v5 43/57] target/loongarch: Implement xvpcnt Song Gao
2023-09-07  8:31 ` [PATCH RESEND v5 44/57] target/loongarch: Implement xvbitclr xvbitset xvbitrev Song Gao
2023-09-07  8:31 ` [PATCH RESEND v5 45/57] target/loongarch: Implement xvfrstp Song Gao
2023-09-07  8:31 ` [PATCH RESEND v5 46/57] target/loongarch: Implement LASX fpu arith instructions Song Gao
2023-09-07  8:31 ` [PATCH RESEND v5 47/57] target/loongarch: Implement LASX fpu fcvt instructions Song Gao
2023-09-07  8:31 ` [PATCH RESEND v5 48/57] target/loongarch: Implement xvseq xvsle xvslt Song Gao
2023-09-07  8:31 ` [PATCH RESEND v5 49/57] target/loongarch: Implement xvfcmp Song Gao
2023-09-07  8:31 ` [PATCH RESEND v5 50/57] target/loongarch: Implement xvbitsel xvset Song Gao
2023-09-07  8:31 ` [PATCH RESEND v5 51/57] target/loongarch: Implement xvinsgr2vr xvpickve2gr Song Gao
2023-09-11 22:27   ` Richard Henderson
2023-09-12  9:09     ` gaosong
2023-09-12 16:20       ` Richard Henderson [this message]
2023-09-07  8:31 ` [PATCH RESEND v5 52/57] target/loongarch: Implement xvreplve xvinsve0 xvpickve Song Gao
2023-09-11 23:21   ` Richard Henderson
2023-09-07  8:31 ` [PATCH RESEND v5 53/57] target/loongarch: Implement xvpack xvpick xvilv{l/h} Song Gao
2023-09-07  8:31 ` [PATCH RESEND v5 54/57] target/loongarch: Implement xvshuf xvperm{i} xvshuf4i Song Gao
2023-09-11 23:45   ` Richard Henderson
2023-09-07  8:31 ` [PATCH RESEND v5 55/57] target/loongarch: Implement xvld xvst Song Gao
2023-09-11 23:47   ` Richard Henderson
2023-09-07  8:31 ` [PATCH RESEND v5 56/57] target/loongarch: Move simply DO_XX marcos togther Song Gao
2023-09-11 23:48   ` Richard Henderson
2023-09-07  8:31 ` [PATCH RESEND v5 57/57] target/loongarch: CPUCFG support LASX Song Gao

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=e3405db6-8670-a764-e584-feb2dca9437c@linaro.org \
    --to=richard.henderson@linaro.org \
    --cc=gaosong@loongson.cn \
    --cc=maobibo@loongson.cn \
    --cc=qemu-devel@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).