Re: [PULL 13/16] target/riscv: Restrict semihosting to TCG

[Thomas Huth <thuth@redhat.com>]

On 05/09/2024 19.08, Thomas Huth wrote:
> On 22/07/2024 13.04, Alex Bennée wrote:
>> From: Philippe Mathieu-Daudé <philmd@linaro.org>
>>
>> Semihosting currently uses the TCG probe_access API. To prepare for
>> encoding the TCG dependency in Kconfig, do not enable it unless TCG
>> is available.
>>
>> Suggested-by: Paolo Bonzini <pbonzini@redhat.com>
>> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
>> Reviewed-by: Anton Johansson <anjo@rev.ng>
>> Message-Id: <20240717105723.58965-7-philmd@linaro.org>
>> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
>> Message-Id: <20240718094523.1198645-14-alex.bennee@linaro.org>
>>
>> diff --git a/target/riscv/Kconfig b/target/riscv/Kconfig
>> index 5f30df22f2..c332616d36 100644
>> --- a/target/riscv/Kconfig
>> +++ b/target/riscv/Kconfig
>> @@ -1,9 +1,9 @@
>>   config RISCV32
>>       bool
>> -    select ARM_COMPATIBLE_SEMIHOSTING # for do_common_semihosting()
>> +    imply ARM_COMPATIBLE_SEMIHOSTING if TCG
>>       select DEVICE_TREE # needed by boot.c
>>   config RISCV64
>>       bool
>> -    select ARM_COMPATIBLE_SEMIHOSTING # for do_common_semihosting()
>> +    imply ARM_COMPATIBLE_SEMIHOSTING if TCG
>>       select DEVICE_TREE # needed by boot.c
> 
>   Hi,
> 
> this patch broke compilation with "--without-default-devices":
> 
> /usr/bin/ld: libqemu-riscv64-softmmu.a.p/target_riscv_cpu_helper.c.o: in 
> function `riscv_cpu_do_interrupt':
> .../qemu/target/riscv/cpu_helper.c:1678:(.text+0x283c): undefined reference 
> to `do_common_semihosting'
> 
> Could you please have a look? I think we either have to revert to "select" 
> instead of "imply", or you might need to put some "#if 
> CONFIG_ARM_COMPATIBLE_SEMIHOSTING" into the code that calls 
> do_common_semihosting() ...?

Suggested a patch here now:

https://lore.kernel.org/qemu-devel/20240906080928.710051-1-thuth@redhat.com/

  Thomas