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[83.57.168.62]) by smtp.gmail.com with ESMTPSA id i10sm9877253wrf.8.2021.10.30.03.05.15 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 30 Oct 2021 03:05:16 -0700 (PDT) Message-ID: Date: Sat, 30 Oct 2021 12:05:15 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.2.0 Subject: Re: [PATCH v6 00/30] More SH4 clean ups (including code style series) Content-Language: en-US To: BALATON Zoltan , qemu-devel@nongnu.org References: From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2a00:1450:4864:20::433; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wr1-x433.google.com X-Spam_score_int: -39 X-Spam_score: -4.0 X-Spam_bar: ---- X-Spam_report: (-4.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.25, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.25, NICE_REPLY_A=-2.512, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Magnus Damm , Richard Henderson , Yoshinori Sato Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 10/29/21 23:02, BALATON Zoltan wrote: > BALATON Zoltan (30): > hw/sh4: Coding style: Remove tabs > hw/sh4: Coding style: Fix multi-line comments > hw/sh4: Coding style: White space fixes > hw/sh4: Coding style: Add missing braces > hw/sh4: Coding style: Remove unnecessary casts > hw/sh4: Fix typos in a comment > hw/sh4: Change debug printfs to traces > hw/sh4/r2d: Use error_report instead of fprintf to stderr > hw/char/sh_serial: Do not abort on invalid access > hw/char/sh_serial: Rename type sh_serial_state to SHSerialState > hw/char/sh_serial: Embed QEMUTimer in state struct > hw/char/sh_serial: Split off sh_serial_reset() from sh_serial_init() > hw/char/sh_serial: QOM-ify > hw/char/sh_serial: Add device id to trace output > hw/intc/sh_intc: Use existing macro instead of local one > hw/intc/sh_intc: Turn some defines into an enum > hw/intc/sh_intc: Rename iomem region > hw/intc/sh_intc: Drop another useless macro > hw/intc/sh_intc: Move sh_intc_register() closer to its only user > hw/intc/sh_intc: Remove excessive parenthesis > hw/intc/sh_intc: Use array index instead of pointer arithmetics > hw/intc/sh_intc: Inline and drop sh_intc_source() function > hw/intc/sh_intc: Replace abort() with g_assert_not_reached() > hw/intc/sh_intc: Avoid using continue in loops > hw/intc/sh_intc: Simplify allocating sources array > hw/intc/sh_intc: Remove unneeded local variable initialisers > hw/timer/sh_timer: Rename sh_timer_state to SHTimerState > hw/timer/sh_timer: Do not wrap lines that are not too long > hw/timer/sh_timer: Fix timer memory region size > hw/timer/sh_timer: Remove use of hw_error Thanks, series queued. Since you are hacking the SH-4 machines, please have a look at Yoshinori work, possibly helping with reviewing once he respin these series, which are good material (and where we want to take our emulation) but are not yet ready for upstream: "Unified peripheral emulation for Renesas chips" https://www.mail-archive.com/qemu-devel@nongnu.org/msg811384.html "Integrate renesas MCU/SoC timer module" https://www.mail-archive.com/qemu-devel@nongnu.org/msg818332.html Regards, Phil.