[PATCH] docs/system: Document Aspeed boards

[PATCH] docs/system: Document Aspeed boards

[Cédric Le Goater]

Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
 docs/system/arm/aspeed.rst | 85 ++++++++++++++++++++++++++++++++++++++
 docs/system/target-arm.rst |  1 +
 2 files changed, 86 insertions(+)
 create mode 100644 docs/system/arm/aspeed.rst

diff --git a/docs/system/arm/aspeed.rst b/docs/system/arm/aspeed.rst
new file mode 100644
index 000000000000..45f891eb3cad
--- /dev/null
+++ b/docs/system/arm/aspeed.rst
@@ -0,0 +1,85 @@
+Aspeed family boards (``*-bmc``, ``ast2500-evb``, ``ast2600-evb``)
+==================================================================
+
+The QEMU Aspeed machines model BMCs of various OpenPOWER systems and
+Aspeed evaluation boards. They are based on different releases of the
+Aspeed SoC : the AST2400 integrating an ARM926EJ-S CPU (400MHz), the
+AST2500 with an ARM1176JZS CPU (800MHz) and more recently the AST2600
+with dual cores ARM Cortex A7 CPUs (1.2GHz).
+
+The SoC comes with RAM, Gigabit ethernet, USB, SD/MMC, USB, SPI, I2C,
+etc.
+
+AST2400 SoC based machines :
+
+- ``palmetto-bmc``         OpenPOWER Palmetto POWER8 BMC
+
+AST2500 SoC based machines :
+
+- ``ast2500-evb``          Aspeed AST2500 Evaluation board
+- ``romulus-bmc``          OpenPOWER Romulus POWER9 BMC
+- ``witherspoon-bmc``      OpenPOWER Witherspoon POWER9 BMC
+- ``sonorapass-bmc``       OCP SonoraPass BMC
+- ``swift-bmc``            OpenPOWER Swift BMC POWER9
+
+AST2600 SoC based machines :
+
+- ``ast2600-evb``          Aspeed AST2600 Evaluation board (Cortex A7)
+- ``tacoma-bmc``           OpenPOWER Witherspoon POWER9 AST2600 BMC
+
+Supported devices
+-----------------
+
+ * SMP (for the AST2600 Cortex-A7)
+ * Interrupt Controller (VIC)
+ * Timer Controller
+ * RTC Controller
+ * I2C Controller
+ * System Control Unit (SCU)
+ * SRAM mapping
+ * X-DMA Controller (basic interface)
+ * Static Memory Controller (SMC or FMC) - Only SPI Flash support
+ * SPI Memory Controller
+ * USB 2.0 Controller
+ * SD/MMC storage controllers
+ * SDRAM controller (dummy interface for basic settings and training)
+ * Watchdog Controller
+ * GPIO Controller (Master only)
+ * UART
+ * Ethernet controllers
+
+
+Missing devices
+---------------
+
+ * Coprocessor support
+ * ADC (out of tree implementation)
+ * PWM and Fan Controller
+ * LPC Bus Controller
+ * Slave GPIO Controller
+ * Super I/O Controller
+ * Hash/Crypto Engine
+ * PCI-Express 1 Controller
+ * Graphic Display Controller
+ * PECI Controller
+ * MCTP Controller
+ * Mailbox Controller
+ * Virtual UART
+ * eSPI Controller
+ * I3C Controller
+
+Boot options
+------------
+
+The Aspeed machines can be started using the -kernel option to load a
+Linux kernel or from a firmare image which can be downloaded from the
+OpenPOWER jenkins :
+
+   https://openpower.xyz/
+
+The image should be attached as an MTD drive. Run :
+
+.. code-block:: bash
+
+  $ qemu-system-arm -M romulus-bmc -nic user \
+	-drive file=flash-romulus,format=raw,if=mtd -nographic
diff --git a/docs/system/target-arm.rst b/docs/system/target-arm.rst
index dce384cb0e3e..1bd477a2936c 100644
--- a/docs/system/target-arm.rst
+++ b/docs/system/target-arm.rst
@@ -81,6 +81,7 @@ undocumented; you can get a complete list by running
    arm/realview
    arm/versatile
    arm/vexpress
+   arm/aspeed
    arm/musicpal
    arm/nseries
    arm/orangepi
-- 
2.25.4

Re: [PATCH] docs/system: Document Aspeed boards

[Philippe Mathieu-Daudé]

On 6/2/20 3:50 PM, Cédric Le Goater wrote:
> Signed-off-by: Cédric Le Goater <clg@kaod.org>
> ---
>  docs/system/arm/aspeed.rst | 85 ++++++++++++++++++++++++++++++++++++++
>  docs/system/target-arm.rst |  1 +
>  2 files changed, 86 insertions(+)
>  create mode 100644 docs/system/arm/aspeed.rst
> 
> diff --git a/docs/system/arm/aspeed.rst b/docs/system/arm/aspeed.rst
> new file mode 100644
> index 000000000000..45f891eb3cad
> --- /dev/null
> +++ b/docs/system/arm/aspeed.rst
> @@ -0,0 +1,85 @@
> +Aspeed family boards (``*-bmc``, ``ast2500-evb``, ``ast2600-evb``)
> +==================================================================
> +
> +The QEMU Aspeed machines model BMCs of various OpenPOWER systems and
> +Aspeed evaluation boards. They are based on different releases of the
> +Aspeed SoC : the AST2400 integrating an ARM926EJ-S CPU (400MHz), the
> +AST2500 with an ARM1176JZS CPU (800MHz) and more recently the AST2600
> +with dual cores ARM Cortex A7 CPUs (1.2GHz).
> +
> +The SoC comes with RAM, Gigabit ethernet, USB, SD/MMC, USB, SPI, I2C,
> +etc.
> +
> +AST2400 SoC based machines :
> +
> +- ``palmetto-bmc``         OpenPOWER Palmetto POWER8 BMC
> +
> +AST2500 SoC based machines :
> +
> +- ``ast2500-evb``          Aspeed AST2500 Evaluation board
> +- ``romulus-bmc``          OpenPOWER Romulus POWER9 BMC
> +- ``witherspoon-bmc``      OpenPOWER Witherspoon POWER9 BMC
> +- ``sonorapass-bmc``       OCP SonoraPass BMC
> +- ``swift-bmc``            OpenPOWER Swift BMC POWER9
> +
> +AST2600 SoC based machines :
> +
> +- ``ast2600-evb``          Aspeed AST2600 Evaluation board (Cortex A7)
> +- ``tacoma-bmc``           OpenPOWER Witherspoon POWER9 AST2600 BMC
> +
> +Supported devices
> +-----------------
> +
> + * SMP (for the AST2600 Cortex-A7)
> + * Interrupt Controller (VIC)
> + * Timer Controller
> + * RTC Controller
> + * I2C Controller
> + * System Control Unit (SCU)
> + * SRAM mapping
> + * X-DMA Controller (basic interface)
> + * Static Memory Controller (SMC or FMC) - Only SPI Flash support
> + * SPI Memory Controller
> + * USB 2.0 Controller
> + * SD/MMC storage controllers
> + * SDRAM controller (dummy interface for basic settings and training)
> + * Watchdog Controller
> + * GPIO Controller (Master only)
> + * UART
> + * Ethernet controllers
> +
> +
> +Missing devices
> +---------------
> +
> + * Coprocessor support
> + * ADC (out of tree implementation)
> + * PWM and Fan Controller
> + * LPC Bus Controller
> + * Slave GPIO Controller
> + * Super I/O Controller

Is there public datasheet for this?

> + * Hash/Crypto Engine
> + * PCI-Express 1 Controller
> + * Graphic Display Controller
> + * PECI Controller
> + * MCTP Controller
> + * Mailbox Controller
> + * Virtual UART

Uh what is that? :)

> + * eSPI Controller
> + * I3C Controller
> +
> +Boot options
> +------------
> +
> +The Aspeed machines can be started using the -kernel option to load a
> +Linux kernel or from a firmare image which can be downloaded from the
> +OpenPOWER jenkins :
> +
> +   https://openpower.xyz/
> +
> +The image should be attached as an MTD drive. Run :
> +
> +.. code-block:: bash
> +
> +  $ qemu-system-arm -M romulus-bmc -nic user \
> +	-drive file=flash-romulus,format=raw,if=mtd -nographic
> diff --git a/docs/system/target-arm.rst b/docs/system/target-arm.rst
> index dce384cb0e3e..1bd477a2936c 100644
> --- a/docs/system/target-arm.rst
> +++ b/docs/system/target-arm.rst
> @@ -81,6 +81,7 @@ undocumented; you can get a complete list by running
>     arm/realview
>     arm/versatile
>     arm/vexpress
> +   arm/aspeed

Maybe we should keep this section sorted.

Otherwise:
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

>     arm/musicpal
>     arm/nseries
>     arm/orangepi
>

Re: [PATCH] docs/system: Document Aspeed boards

[Cédric Le Goater]

On 6/2/20 5:00 PM, Philippe Mathieu-Daudé wrote:
> On 6/2/20 3:50 PM, Cédric Le Goater wrote:
>> Signed-off-by: Cédric Le Goater <clg@kaod.org>
>> ---
>>  docs/system/arm/aspeed.rst | 85 ++++++++++++++++++++++++++++++++++++++
>>  docs/system/target-arm.rst |  1 +
>>  2 files changed, 86 insertions(+)
>>  create mode 100644 docs/system/arm/aspeed.rst
>>
>> diff --git a/docs/system/arm/aspeed.rst b/docs/system/arm/aspeed.rst
>> new file mode 100644
>> index 000000000000..45f891eb3cad
>> --- /dev/null
>> +++ b/docs/system/arm/aspeed.rst
>> @@ -0,0 +1,85 @@
>> +Aspeed family boards (``*-bmc``, ``ast2500-evb``, ``ast2600-evb``)
>> +==================================================================
>> +
>> +The QEMU Aspeed machines model BMCs of various OpenPOWER systems and
>> +Aspeed evaluation boards. They are based on different releases of the
>> +Aspeed SoC : the AST2400 integrating an ARM926EJ-S CPU (400MHz), the
>> +AST2500 with an ARM1176JZS CPU (800MHz) and more recently the AST2600
>> +with dual cores ARM Cortex A7 CPUs (1.2GHz).
>> +
>> +The SoC comes with RAM, Gigabit ethernet, USB, SD/MMC, USB, SPI, I2C,
>> +etc.
>> +
>> +AST2400 SoC based machines :
>> +
>> +- ``palmetto-bmc``         OpenPOWER Palmetto POWER8 BMC
>> +
>> +AST2500 SoC based machines :
>> +
>> +- ``ast2500-evb``          Aspeed AST2500 Evaluation board
>> +- ``romulus-bmc``          OpenPOWER Romulus POWER9 BMC
>> +- ``witherspoon-bmc``      OpenPOWER Witherspoon POWER9 BMC
>> +- ``sonorapass-bmc``       OCP SonoraPass BMC
>> +- ``swift-bmc``            OpenPOWER Swift BMC POWER9
>> +
>> +AST2600 SoC based machines :
>> +
>> +- ``ast2600-evb``          Aspeed AST2600 Evaluation board (Cortex A7)
>> +- ``tacoma-bmc``           OpenPOWER Witherspoon POWER9 AST2600 BMC
>> +
>> +Supported devices
>> +-----------------
>> +
>> + * SMP (for the AST2600 Cortex-A7)
>> + * Interrupt Controller (VIC)
>> + * Timer Controller
>> + * RTC Controller
>> + * I2C Controller
>> + * System Control Unit (SCU)
>> + * SRAM mapping
>> + * X-DMA Controller (basic interface)
>> + * Static Memory Controller (SMC or FMC) - Only SPI Flash support
>> + * SPI Memory Controller
>> + * USB 2.0 Controller
>> + * SD/MMC storage controllers
>> + * SDRAM controller (dummy interface for basic settings and training)
>> + * Watchdog Controller
>> + * GPIO Controller (Master only)
>> + * UART
>> + * Ethernet controllers
>> +
>> +
>> +Missing devices
>> +---------------
>> +
>> + * Coprocessor support
>> + * ADC (out of tree implementation)
>> + * PWM and Fan Controller
>> + * LPC Bus Controller
>> + * Slave GPIO Controller
>> + * Super I/O Controller
> 
> Is there public datasheet for this?

Nope.

>> + * Hash/Crypto Engine
>> + * PCI-Express 1 Controller
>> + * Graphic Display Controller
>> + * PECI Controller
>> + * MCTP Controller
>> + * Mailbox Controller
>> + * Virtual UART
> 
> Uh what is that? :)

It is the host console. 

>> + * eSPI Controller
>> + * I3C Controller
>> +
>> +Boot options
>> +------------
>> +
>> +The Aspeed machines can be started using the -kernel option to load a
>> +Linux kernel or from a firmare image which can be downloaded from the
>> +OpenPOWER jenkins :
>> +
>> +   https://openpower.xyz/
>> +
>> +The image should be attached as an MTD drive. Run :
>> +
>> +.. code-block:: bash
>> +
>> +  $ qemu-system-arm -M romulus-bmc -nic user \
>> +	-drive file=flash-romulus,format=raw,if=mtd -nographic
>> diff --git a/docs/system/target-arm.rst b/docs/system/target-arm.rst
>> index dce384cb0e3e..1bd477a2936c 100644
>> --- a/docs/system/target-arm.rst
>> +++ b/docs/system/target-arm.rst
>> @@ -81,6 +81,7 @@ undocumented; you can get a complete list by running
>>     arm/realview
>>     arm/versatile
>>     arm/vexpress
>> +   arm/aspeed
> 
> Maybe we should keep this section sorted.

They are, using the title in the file : "Aspeed family boards"

Thanks

C.
 
> Otherwise:
> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> 
>>     arm/musicpal
>>     arm/nseries
>>     arm/orangepi
>>

Re: [PATCH] docs/system: Document Aspeed boards

[Andrew Jeffery]

> 
> >> + * Hash/Crypto Engine
> >> + * PCI-Express 1 Controller
> >> + * Graphic Display Controller
> >> + * PECI Controller
> >> + * MCTP Controller
> >> + * Mailbox Controller
> >> + * Virtual UART
> > 
> > Uh what is that? :)
> 
> It is the host console. 
> 

To explain a little more, a 16550-compatible set of registers are exposed to 
both the host (via e.g. the LPC bus) and the BMC, but the FIFOs are shared and 
the transmissions are nothing more than register writes/reads from each side. 
There's no RS-232 involved, hence "Virtual" I guess.

Andrew

Re: [PATCH] docs/system: Document Aspeed boards

[Peter Maydell]

On Tue, 2 Jun 2020 at 14:51, Cédric Le Goater <clg@kaod.org> wrote:
>
> Signed-off-by: Cédric Le Goater <clg@kaod.org>
> ---
>  docs/system/arm/aspeed.rst | 85 ++++++++++++++++++++++++++++++++++++++
>  docs/system/target-arm.rst |  1 +
>  2 files changed, 86 insertions(+)
>  create mode 100644 docs/system/arm/aspeed.rst



Applied to target-arm.next, thanks.

-- PMM