From: Thomas Huth <thuth@redhat.com>
To: "Jamin Lin" <jamin_lin@aspeedtech.com>,
"Cédric Le Goater" <clg@kaod.org>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Steven Lee" <steven_lee@aspeedtech.com>,
"Troy Lee" <leetroy@gmail.com>,
"Andrew Jeffery" <andrew@codeconstruct.com.au>,
"Joel Stanley" <joel@jms.id.au>,
"Laurent Vivier" <lvivier@redhat.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"open list:ASPEED BMCs" <qemu-arm@nongnu.org>,
"open list:All patches CC here" <qemu-devel@nongnu.org>
Cc: troy_lee@aspeedtech.com, yunlin.tang@aspeedtech.com
Subject: Re: [PATCH v6 8/8] hw/gpio/aspeed: Add test case for AST2700
Date: Mon, 30 Sep 2024 18:36:54 +0200 [thread overview]
Message-ID: <e3f31190-85fb-41c9-9ecb-eefdaa8c5c49@redhat.com> (raw)
In-Reply-To: <20240930085239.3089901-9-jamin_lin@aspeedtech.com>
On 30/09/2024 10.52, Jamin Lin wrote:
> Add test case to test GPIO output and input pins from A0 to D7 for AST2700.
>
> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
> ---
> tests/qtest/aspeed_gpio-test.c | 77 ++++++++++++++++++++++++++++++++--
> tests/qtest/meson.build | 3 ++
> 2 files changed, 76 insertions(+), 4 deletions(-)
>
> diff --git a/tests/qtest/aspeed_gpio-test.c b/tests/qtest/aspeed_gpio-test.c
> index d38f51d719..03b3b1c2b2 100644
> --- a/tests/qtest/aspeed_gpio-test.c
> +++ b/tests/qtest/aspeed_gpio-test.c
> @@ -33,6 +33,10 @@
> #define GPIO_ABCD_DATA_VALUE 0x000
> #define GPIO_ABCD_DIRECTION 0x004
>
> +/* AST2700 */
> +#define AST2700_GPIO_BASE 0x14C0B000
> +#define GPIOA0_CONTROL 0x180
> +
> static void test_set_colocated_pins(const void *data)
> {
> QTestState *s = (QTestState *)data;
> @@ -72,17 +76,82 @@ static void test_set_input_pins(const void *data)
> g_assert_cmphex(value, ==, 0xffffffff);
> }
>
> +static void test_2700_output_pins(const void *data)
> +{
> + QTestState *s = (QTestState *)data;
> + uint32_t offset = 0;
> + uint32_t value = 0;
> + uint32_t pin = 0;
> +
> + for (char c = 'A'; c <= 'D'; c++) {
> + for (int i = 0; i < 8; i++) {
> + offset = AST2700_GPIO_BASE + GPIOA0_CONTROL + (pin * 4);
> +
> + /* output direction and output hi */
> + qtest_writel(s, offset, 0x00000003);
> + value = qtest_readl(s, offset);
> + g_assert_cmphex(value, ==, 0x00000003);
> +
> + /* output direction and output low */
> + qtest_writel(s, offset, 0x00000002);
> + value = qtest_readl(s, offset);
> + g_assert_cmphex(value, ==, 0x00000002);
> + pin++;
> + }
> + }
> +}
> +
> +static void test_2700_input_pins(const void *data)
> +{
> + QTestState *s = (QTestState *)data;
> + char name[16];
> + uint32_t offset = 0;
> + uint32_t value = 0;
> + uint32_t pin = 0;
> +
> + for (char c = 'A'; c <= 'D'; c++) {
> + for (int i = 0; i < 8; i++) {
> + sprintf(name, "gpio%c%d", c, i);
> + offset = AST2700_GPIO_BASE + GPIOA0_CONTROL + (pin * 4);
> + /* input direction */
> + qtest_writel(s, offset, 0);
> +
> + /* set input */
> + qtest_qom_set_bool(s, "/machine/soc/gpio", name, true);
> + value = qtest_readl(s, offset);
> + g_assert_cmphex(value, ==, 0x00002000);
> +
> + /* clear input */
> + qtest_qom_set_bool(s, "/machine/soc/gpio", name, false);
> + value = qtest_readl(s, offset);
> + g_assert_cmphex(value, ==, 0);
> + pin++;
> + }
> + }
> +}
As far as I can see, there is nothing in these two functions that requires
any of the other code in this file ...
> +
> int main(int argc, char **argv)
> {
> + const char *arch = qtest_get_arch();
> QTestState *s;
> int r;
>
> g_test_init(&argc, &argv, NULL);
>
> - s = qtest_init("-machine ast2600-evb");
> - qtest_add_data_func("/ast2600/gpio/set_colocated_pins", s,
> - test_set_colocated_pins);
> - qtest_add_data_func("/ast2600/gpio/set_input_pins", s, test_set_input_pins);
> + if (strcmp(arch, "aarch64") == 0) {
> + s = qtest_init("-machine ast2700-evb");
> + qtest_add_data_func("/ast2700/gpio/input_pins",
> + s, test_2700_input_pins);
> + qtest_add_data_func("/ast2700/gpio/out_pins", s, test_2700_output_pins);
> + } else {
> + s = qtest_init("-machine ast2600-evb");
> + qtest_add_data_func("/ast2600/gpio/set_colocated_pins", s,
> + test_set_colocated_pins);
> + qtest_add_data_func("/ast2600/gpio/set_input_pins", s,
> + test_set_input_pins);
> + }
... so the more I look at this, the more I think your new test should reside
in a separate file that only gets executed for aarch64, while this file here
should stay for arm 32-bit. Or is there a real compelling reason for putting
your code in this file here?
Thomas
> r = g_test_run();
> qtest_quit(s);
>
> diff --git a/tests/qtest/meson.build b/tests/qtest/meson.build
> index 310865e49c..292980e3ad 100644
> --- a/tests/qtest/meson.build
> +++ b/tests/qtest/meson.build
> @@ -209,6 +209,8 @@ qtests_aspeed = \
> ['aspeed_hace-test',
> 'aspeed_smc-test',
> 'aspeed_gpio-test']
> +qtests_aspeed64 = \
> + ['aspeed_gpio-test']
>
> qtests_stm32l4x5 = \
> ['stm32l4x5_exti-test',
> @@ -247,6 +249,7 @@ qtests_aarch64 = \
> (config_all_devices.has_key('CONFIG_RASPI') ? ['bcm2835-dma-test', 'bcm2835-i2c-test'] : []) + \
> (config_all_accel.has_key('CONFIG_TCG') and \
> config_all_devices.has_key('CONFIG_TPM_TIS_I2C') ? ['tpm-tis-i2c-test'] : []) + \
> + (config_all_devices.has_key('CONFIG_ASPEED_SOC') ? qtests_aspeed64 : []) + \
> ['arm-cpu-features',
> 'numa-test',
> 'boot-serial-test',
next prev parent reply other threads:[~2024-09-30 16:37 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-30 8:52 [PATCH v6 0/8] Support GPIO for AST2700 Jamin Lin via
2024-09-30 8:52 ` [PATCH v6 1/8] hw/gpio/aspeed: Fix coding style Jamin Lin via
2024-09-30 8:52 ` [PATCH v6 2/8] hw/gpio/aspeed: Support to set the different memory size Jamin Lin via
2024-09-30 8:52 ` [PATCH v6 3/8] hw/gpio/aspeed: Support different memory region ops Jamin Lin via
2024-09-30 8:52 ` [PATCH v6 4/8] hw/gpio/aspeed: Fix clear incorrect interrupt status for GPIO index mode Jamin Lin via
2024-09-30 8:52 ` [PATCH v6 5/8] hw/gpio/aspeed: Add AST2700 support Jamin Lin via
2024-09-30 8:52 ` [PATCH v6 6/8] aspeed/soc: Correct GPIO irq 130 for AST2700 Jamin Lin via
2024-09-30 9:11 ` [SPAM] " Cédric Le Goater
2024-09-30 8:52 ` [PATCH v6 7/8] aspeed/soc: Support GPIO " Jamin Lin via
2024-09-30 9:11 ` [SPAM] " Cédric Le Goater
2024-09-30 8:52 ` [PATCH v6 8/8] hw/gpio/aspeed: Add test case " Jamin Lin via
2024-09-30 16:36 ` Thomas Huth [this message]
2024-09-30 16:48 ` Cédric Le Goater
2024-09-30 17:23 ` Thomas Huth
2024-10-01 1:15 ` Jamin Lin
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=e3f31190-85fb-41c9-9ecb-eefdaa8c5c49@redhat.com \
--to=thuth@redhat.com \
--cc=andrew@codeconstruct.com.au \
--cc=clg@kaod.org \
--cc=jamin_lin@aspeedtech.com \
--cc=joel@jms.id.au \
--cc=leetroy@gmail.com \
--cc=lvivier@redhat.com \
--cc=pbonzini@redhat.com \
--cc=peter.maydell@linaro.org \
--cc=qemu-arm@nongnu.org \
--cc=qemu-devel@nongnu.org \
--cc=steven_lee@aspeedtech.com \
--cc=troy_lee@aspeedtech.com \
--cc=yunlin.tang@aspeedtech.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).