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From: Eric Auger <eric.auger@redhat.com>
To: Zhenzhong Duan <zhenzhong.duan@intel.com>, qemu-devel@nongnu.org
Cc: alex.williamson@redhat.com, clg@redhat.com, mst@redhat.com,
	jasowang@redhat.com, peterx@redhat.com, ddutile@redhat.com,
	jgg@nvidia.com, nicolinc@nvidia.com,
	shameerali.kolothum.thodi@huawei.com, joao.m.martins@oracle.com,
	clement.mathieu--drif@eviden.com, kevin.tian@intel.com,
	yi.l.liu@intel.com, chao.p.peng@intel.com,
	Yi Sun <yi.y.sun@linux.intel.com>,
	Paolo Bonzini <pbonzini@redhat.com>,
	Richard Henderson <richard.henderson@linaro.org>,
	Eduardo Habkost <eduardo@habkost.net>,
	Marcel Apfelbaum <marcel.apfelbaum@gmail.com>
Subject: Re: [PATCH v2 12/19] intel_iommu: Introduce a new pasid cache invalidation type FORCE_RESET
Date: Mon, 23 Jun 2025 13:55:24 +0200	[thread overview]
Message-ID: <e402a485-66be-44d4-9cc5-aa7157511f76@redhat.com> (raw)
In-Reply-To: <20250620071813.55571-13-zhenzhong.duan@intel.com>

Hi Zhenzhong,

On 6/20/25 9:18 AM, Zhenzhong Duan wrote:
> FORCE_RESET is different from GLOBAL_INV which updates pasid cache if
> underlying pasid entry is still valid, it drops all the pasid caches.
>
> FORCE_RESET isn't a VTD spec defined invalidation type for pasid cache,
> only used internally in system level reset.
this comment shall be put in the code, along with the VTDPCInvType
because the reader may look for that cmd in the spec.
>
> Signed-off-by: Yi Liu <yi.l.liu@intel.com>
> Signed-off-by: Yi Sun <yi.y.sun@linux.intel.com>
> Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com>
> ---
>  hw/i386/intel_iommu_internal.h |  2 ++
>  hw/i386/intel_iommu.c          | 28 ++++++++++++++++++++++++++++
>  hw/i386/trace-events           |  1 +
>  3 files changed, 31 insertions(+)
>
> diff --git a/hw/i386/intel_iommu_internal.h b/hw/i386/intel_iommu_internal.h
> index 025787b3b9..5ed76864be 100644
> --- a/hw/i386/intel_iommu_internal.h
> +++ b/hw/i386/intel_iommu_internal.h
> @@ -564,6 +564,8 @@ typedef struct VTDRootEntry VTDRootEntry;
>  #define VTD_SM_CONTEXT_ENTRY_RSVD_VAL1      0xffffffffffe00000ULL
>  
>  typedef enum VTDPCInvType {
> +    /* Force reset all */
> +    VTD_PASID_CACHE_FORCE_RESET = 0,
>      /* pasid cache invalidation rely on guest PASID entry */
>      VTD_PASID_CACHE_GLOBAL_INV, /* pasid cache global invalidation */
>      VTD_PASID_CACHE_DOMSI,      /* pasid cache domain selective invalidation */
> diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
> index f4273dc640..ed71bb8ec7 100644
> --- a/hw/i386/intel_iommu.c
> +++ b/hw/i386/intel_iommu.c
> @@ -87,6 +87,8 @@ struct vtd_iotlb_key {
>  static void vtd_address_space_refresh_all(IntelIOMMUState *s);
>  static void vtd_address_space_unmap(VTDAddressSpace *as, IOMMUNotifier *n);
>  
> +static void vtd_pasid_cache_reset_locked(IntelIOMMUState *s);
> +
>  static void vtd_panic_require_caching_mode(void)
>  {
>      error_report("We need to set caching-mode=on for intel-iommu to enable "
> @@ -391,6 +393,7 @@ static void vtd_reset_caches(IntelIOMMUState *s)
>      vtd_iommu_lock(s);
>      vtd_reset_iotlb_locked(s);
>      vtd_reset_context_cache_locked(s);
> +    vtd_pasid_cache_reset_locked(s);
>      vtd_iommu_unlock(s);
>  }
>  
> @@ -3196,6 +3199,8 @@ static gboolean vtd_flush_pasid(gpointer key, gpointer value,
>      }
>  
>      switch (pc_info->type) {
> +    case VTD_PASID_CACHE_FORCE_RESET:
> +        goto remove;
>      case VTD_PASID_CACHE_PASIDSI:
>          if (pc_info->pasid != pasid) {
>              return false;
> @@ -3251,6 +3256,26 @@ remove:
>      return true;
>  }
>  
> +/* Caller of this function should hold iommu_lock */
> +static void vtd_pasid_cache_reset_locked(IntelIOMMUState *s)
> +{
> +    VTDPASIDCacheInfo pc_info = {};
> +
> +    trace_vtd_pasid_cache_reset();
> +
> +    pc_info.type = VTD_PASID_CACHE_FORCE_RESET;
> +
> +    /*
> +     * Reset pasid cache is a big hammer, so use g_hash_table_foreach_remove
> +     * which will free the vtd_as instances. Also, as a big hammer, use
> +     * VTD_PASID_CACHE_FORCE_RESET to ensure all the vtd_as instances are
> +     * dropped, meanwhile the change will be passed to host if
> +     * HostIOMMUDeviceIOMMUFD is available.
> +     */
> +    g_hash_table_foreach_remove(s->vtd_address_spaces,
> +                                vtd_flush_pasid, &pc_info);
> +}
> +
>  static void vtd_sm_pasid_table_walk_one(IntelIOMMUState *s,
>                                          dma_addr_t pt_base,
>                                          int start,
> @@ -3377,6 +3402,9 @@ static void vtd_replay_guest_pasid_bindings(IntelIOMMUState *s,
>      case VTD_PASID_CACHE_GLOBAL_INV:
>          /* loop all assigned devices */
>          break;
> +    case VTD_PASID_CACHE_FORCE_RESET:
> +        /* For force reset, no need to go further replay */
> +        return;
>      default:
>          error_report("invalid pc_info->type for replay");
>          abort();
> diff --git a/hw/i386/trace-events b/hw/i386/trace-events
> index ae5bbfcdc0..c8a936eb46 100644
> --- a/hw/i386/trace-events
> +++ b/hw/i386/trace-events
> @@ -24,6 +24,7 @@ vtd_inv_qi_head(uint16_t head) "read head %d"
>  vtd_inv_qi_tail(uint16_t head) "write tail %d"
>  vtd_inv_qi_fetch(void) ""
>  vtd_context_cache_reset(void) ""
> +vtd_pasid_cache_reset(void) ""
>  vtd_pasid_cache_gsi(void) ""
>  vtd_pasid_cache_dsi(uint16_t domain) "Domain selective PC invalidation domain 0x%"PRIx16
>  vtd_pasid_cache_psi(uint16_t domain, uint32_t pasid) "PASID selective PC invalidation domain 0x%"PRIx16" pasid 0x%"PRIx32
Eric



  reply	other threads:[~2025-06-23 11:56 UTC|newest]

Thread overview: 58+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-06-20  7:17 [PATCH v2 00/19] intel_iommu: Enable stage-1 translation for passthrough device Zhenzhong Duan
2025-06-20  7:17 ` [PATCH v2 01/19] intel_iommu: Rename vtd_ce_get_rid2pasid_entry to vtd_ce_get_pasid_entry Zhenzhong Duan
2025-06-20  7:17 ` [PATCH v2 02/19] hw/pci: Introduce pci_device_get_viommu_cap() Zhenzhong Duan
2025-06-20  7:53   ` Eric Auger
2025-06-23  2:20     ` Duan, Zhenzhong
2025-06-23  9:30       ` Eric Auger
2025-06-20  7:17 ` [PATCH v2 03/19] intel_iommu: Implement get_viommu_cap() callback Zhenzhong Duan
2025-06-20  8:10   ` Eric Auger
2025-06-23  2:20     ` Duan, Zhenzhong
2025-06-20  7:17 ` [PATCH v2 04/19] vfio/iommufd: Force creating nested parent domain Zhenzhong Duan
2025-06-20  8:08   ` Eric Auger
2025-06-23  2:33     ` Duan, Zhenzhong
2025-06-20  7:17 ` [PATCH v2 05/19] hw/pci: Export pci_device_get_iommu_bus_devfn() and return bool Zhenzhong Duan
2025-06-20 11:59   ` Eric Auger
2025-06-23  2:47     ` Duan, Zhenzhong
2025-06-23  9:31       ` Eric Auger
2025-06-20  7:18 ` [PATCH v2 06/19] intel_iommu: Introduce a new structure VTDHostIOMMUDevice Zhenzhong Duan
2025-06-20  7:18 ` [PATCH v2 07/19] intel_iommu: Check for compatibility with IOMMUFD backed device when x-flts=on Zhenzhong Duan
2025-06-20 12:05   ` Eric Auger
2025-06-23  2:44     ` Duan, Zhenzhong
2025-06-20  7:18 ` [PATCH v2 08/19] intel_iommu: Fail passthrough device under PCI bridge if x-flts=on Zhenzhong Duan
2025-06-20 12:18   ` Eric Auger
2025-06-23  3:20     ` Duan, Zhenzhong
2025-06-20  7:18 ` [PATCH v2 09/19] intel_iommu: Introduce two helpers vtd_as_from/to_iommu_pasid_locked Zhenzhong Duan
2025-06-20 12:46   ` Eric Auger
2025-06-24  2:48     ` Duan, Zhenzhong
2025-07-07  3:12       ` Duan, Zhenzhong
2025-07-07 16:54         ` Eric Auger
2025-07-08  2:35           ` Duan, Zhenzhong
2025-06-20  7:18 ` [PATCH v2 10/19] intel_iommu: Handle PASID entry removing and updating Zhenzhong Duan
2025-06-20 15:44   ` Eric Auger
2025-06-24  3:34     ` Duan, Zhenzhong
2025-06-20  7:18 ` [PATCH v2 11/19] intel_iommu: Handle PASID entry adding Zhenzhong Duan
2025-06-23 11:47   ` Eric Auger
2025-06-24 10:56     ` Duan, Zhenzhong
2025-06-20  7:18 ` [PATCH v2 12/19] intel_iommu: Introduce a new pasid cache invalidation type FORCE_RESET Zhenzhong Duan
2025-06-23 11:55   ` Eric Auger [this message]
2025-06-26  8:28     ` Duan, Zhenzhong
2025-06-20  7:18 ` [PATCH v2 13/19] intel_iommu: Stick to system MR for IOMMUFD backed host device when x-fls=on Zhenzhong Duan
2025-06-23 12:02   ` Eric Auger
2025-06-26  8:37     ` Duan, Zhenzhong
2025-06-20  7:18 ` [PATCH v2 14/19] intel_iommu: Bind/unbind guest page table to host Zhenzhong Duan
2025-06-23 13:17   ` Eric Auger
2025-06-26  9:17     ` Duan, Zhenzhong
2025-06-20  7:18 ` [PATCH v2 15/19] intel_iommu: Replay pasid binds after context cache invalidation Zhenzhong Duan
2025-06-23 13:25   ` Eric Auger
2025-06-26  9:27     ` Duan, Zhenzhong
2025-06-20  7:18 ` [PATCH v2 16/19] intel_iommu: Propagate PASID-based iotlb invalidation to host Zhenzhong Duan
2025-06-23 13:41   ` Eric Auger
2025-06-26  9:42     ` Duan, Zhenzhong
2025-06-20  7:18 ` [PATCH v2 17/19] intel_iommu: Refresh pasid bind when either SRTP or TE bit is changed Zhenzhong Duan
2025-06-23 13:48   ` Eric Auger
2025-06-26 10:16     ` Duan, Zhenzhong
2025-06-20  7:18 ` [PATCH v2 18/19] Workaround for ERRATA_772415_SPR17 Zhenzhong Duan
2025-06-20 16:01   ` Eric Auger
2025-06-23  3:29     ` Duan, Zhenzhong
2025-06-23  9:33       ` Eric Auger
2025-06-20  7:18 ` [PATCH v2 19/19] intel_iommu: Enable host device when x-flts=on in scalable mode Zhenzhong Duan

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