From: Richard Henderson <richard.henderson@linaro.org>
To: remi.denis.courmont@huawei.com, qemu-arm@nongnu.org
Cc: qemu-devel@nongnu.org
Subject: Re: [PATCH 14/18] target/arm: secure stage 2 translation regime
Date: Mon, 11 Jan 2021 14:20:31 -1000 [thread overview]
Message-ID: <e46f18fc-8add-fea5-f598-c10570e7895c@linaro.org> (raw)
In-Reply-To: <20201218103759.19929-14-remi.denis.courmont@huawei.com>
On 12/18/20 12:37 AM, remi.denis.courmont@huawei.com wrote:
> @@ -3586,10 +3586,10 @@ static void ats_write(CPUARMState *env, const ARMCPRegInfo *ri, uint64_t value)
> /* fall through */
> case 1:
> if (ri->crm == 9 && (env->uncached_cpsr & CPSR_PAN)) {
> - mmu_idx = (secure ? ARMMMUIdx_SE10_1_PAN
> + mmu_idx = (secure ? ARMMMUIdx_Stage1_SE1_PAN
> : ARMMMUIdx_Stage1_E1_PAN);
> } else {
> - mmu_idx = secure ? ARMMMUIdx_SE10_1 : ARMMMUIdx_Stage1_E1;
> + mmu_idx = secure ? ARMMMUIdx_Stage1_SE1 : ARMMMUIdx_Stage1_E1;
> }
> break;
Was this a bug that we weren't treating SE10 properly vs two-stage lookup? If
so, it warrants mentioning in the patch description.
r~
next prev parent reply other threads:[~2021-01-12 0:24 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-18 10:37 [PATCHv4 00/18] ARMv8.4-A Secure EL2 Rémi Denis-Courmont
2020-12-18 10:37 ` [PATCH 01/18] target/arm: remove redundant tests remi.denis.courmont
2020-12-18 10:37 ` [PATCH 02/18] target/arm: add arm_is_el2_enabled() helper remi.denis.courmont
2020-12-18 10:37 ` [PATCH 03/18] target/arm: use arm_is_el2_enabled() where applicable remi.denis.courmont
2020-12-21 20:54 ` Richard Henderson
2021-01-04 12:08 ` Rémi Denis-Courmont
2020-12-18 10:37 ` [PATCH 04/18] target/arm: use arm_hcr_el2_eff() " remi.denis.courmont
2020-12-18 10:37 ` [PATCH 05/18] target/arm: factor MDCR_EL2 common handling remi.denis.courmont
2020-12-18 10:37 ` [PATCH 06/18] target/arm: declare new AA64PFR0 bit-fields remi.denis.courmont
2020-12-18 10:37 ` [PATCH 07/18] target/arm: add 64-bit S-EL2 to EL exception table remi.denis.courmont
2021-01-12 0:04 ` Richard Henderson
2021-01-12 9:04 ` Rémi Denis-Courmont
2021-01-12 9:55 ` Peter Maydell
2020-12-18 10:37 ` [PATCH 08/18] target/arm: add MMU stage 1 for Secure EL2 remi.denis.courmont
2020-12-18 10:37 ` [PATCH 09/18] target/arm: add ARMv8.4-SEL2 system registers remi.denis.courmont
2021-01-12 0:05 ` Richard Henderson
2020-12-18 10:37 ` [PATCH 10/18] target/arm: handle VMID change in secure state remi.denis.courmont
2020-12-18 10:37 ` [PATCH 11/18] target/arm: do S1_ptw_translate() before address space lookup remi.denis.courmont
2020-12-18 10:37 ` [PATCH 12/18] target/arm: translate NS bit in page-walks remi.denis.courmont
2021-01-12 0:06 ` Richard Henderson
2020-12-18 10:37 ` [PATCH 13/18] target/arm: generalize 2-stage page-walk condition remi.denis.courmont
2021-01-12 0:07 ` Richard Henderson
2020-12-18 10:37 ` [PATCH 14/18] target/arm: secure stage 2 translation regime remi.denis.courmont
2021-01-12 0:19 ` Richard Henderson
2021-01-12 7:27 ` Rémi Denis-Courmont
2021-01-12 0:20 ` Richard Henderson [this message]
2021-01-12 7:29 ` Rémi Denis-Courmont
2020-12-18 10:37 ` [PATCH 15/18] target/arm: set HPFAR_EL2.NS on secure stage 2 faults remi.denis.courmont
2021-01-12 0:10 ` Richard Henderson
2020-12-18 10:37 ` [PATCH 16/18] target/arm: add ARMv8.4-SEL2 extension remi.denis.courmont
2021-01-12 0:13 ` Richard Henderson
2021-01-12 7:33 ` Rémi Denis-Courmont
2020-12-18 10:37 ` [PATCH 17/18] target/arm: enable Secure EL2 in max CPU remi.denis.courmont
2020-12-18 10:37 ` [PATCH 18/18] target/arm: refactor vae1_tlbmask() remi.denis.courmont
2021-01-12 0:14 ` Richard Henderson
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