[PATCH 0/3] target/nios2: Use tcg_constant_*

[PATCH 0/3] target/nios2: Use tcg_constant_*

[Philippe Mathieu-Daudé]

Replace temporary TCG registers by tcg_constant_*() when possible.

Philippe Mathieu-Daudé (3):
  target/nios2: Replace load_zero() by zero constant in DisasContext
  target/nios2: Use DisasContext::zero constant instead of temporary
  target/nios2: Use tcg_constant_*

 target/nios2/translate.c | 33 ++++++---------------------------
 1 file changed, 6 insertions(+), 27 deletions(-)

-- 
2.31.1

[PATCH 1/3] target/nios2: Replace load_zero() by zero constant in DisasContext

[Philippe Mathieu-Daudé]

Instead of using a temporary for $zero, keep a reference to the
constant pool.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 target/nios2/translate.c | 17 ++---------------
 1 file changed, 2 insertions(+), 15 deletions(-)

diff --git a/target/nios2/translate.c b/target/nios2/translate.c
index 08d7ac53983..c398c5320fb 100644
--- a/target/nios2/translate.c
+++ b/target/nios2/translate.c
@@ -122,20 +122,12 @@ static uint8_t get_opxcode(uint32_t code)
     return instr.opx;
 }
 
-static TCGv load_zero(DisasContext *dc)
-{
-    if (!dc->zero) {
-        dc->zero = tcg_const_i32(0);
-    }
-    return dc->zero;
-}
-
 static TCGv load_gpr(DisasContext *dc, uint8_t reg)
 {
     if (likely(reg != R_ZERO)) {
         return cpu_R[reg];
     } else {
-        return load_zero(dc);
+        return dc->zero;
     }
 }
 
@@ -752,6 +744,7 @@ static void nios2_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cs)
     int page_insns;
 
     dc->mem_idx = cpu_mmu_index(env, false);
+    dc->zero = tcg_constant_i32(0);
 
     /* Bound the number of insns to execute to those left on the page.  */
     page_insns = -(dc->base.pc_first | TARGET_PAGE_MASK) / 4;
@@ -797,14 +790,8 @@ static void nios2_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs)
         return;
     }
 
-    dc->zero = NULL;
-
     instr = &i_type_instructions[op];
     instr->handler(dc, code, instr->flags);
-
-    if (dc->zero) {
-        tcg_temp_free(dc->zero);
-    }
 }
 
 static void nios2_tr_tb_stop(DisasContextBase *dcbase, CPUState *cs)
-- 
2.31.1

Re: [PATCH 1/3] target/nios2: Replace load_zero() by zero constant in DisasContext

[Richard Henderson]

On 10/2/21 7:30 PM, Philippe Mathieu-Daudé wrote:
> Instead of using a temporary for $zero, keep a reference to the
> constant pool.
> 
> Signed-off-by: Philippe Mathieu-Daudé<f4bug@amsat.org>
> ---
>   target/nios2/translate.c | 17 ++---------------
>   1 file changed, 2 insertions(+), 15 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~

[PATCH 2/3] target/nios2: Use DisasContext::zero constant instead of temporary

[Philippe Mathieu-Daudé]

We already have a register holding the zero value in the constant
pool, use it instead of a temporary.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 target/nios2/translate.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/target/nios2/translate.c b/target/nios2/translate.c
index c398c5320fb..8524a2f6dd8 100644
--- a/target/nios2/translate.c
+++ b/target/nios2/translate.c
@@ -613,17 +613,15 @@ static void divu(DisasContext *dc, uint32_t code, uint32_t flags)
 
     TCGv t0 = tcg_temp_new();
     TCGv t1 = tcg_temp_new();
-    TCGv t2 = tcg_const_tl(0);
     TCGv t3 = tcg_const_tl(1);
 
     tcg_gen_ext32u_tl(t0, load_gpr(dc, instr.a));
     tcg_gen_ext32u_tl(t1, load_gpr(dc, instr.b));
-    tcg_gen_movcond_tl(TCG_COND_EQ, t1, t1, t2, t3, t1);
+    tcg_gen_movcond_tl(TCG_COND_EQ, t1, t1, dc->zero, t3, t1);
     tcg_gen_divu_tl(cpu_R[instr.c], t0, t1);
     tcg_gen_ext32s_tl(cpu_R[instr.c], cpu_R[instr.c]);
 
     tcg_temp_free(t3);
-    tcg_temp_free(t2);
     tcg_temp_free(t1);
     tcg_temp_free(t0);
 }
-- 
2.31.1

Re: [PATCH 2/3] target/nios2: Use DisasContext::zero constant instead of temporary

[Richard Henderson]

On 10/2/21 7:30 PM, Philippe Mathieu-Daudé wrote:
> We already have a register holding the zero value in the constant
> pool, use it instead of a temporary.
> 
> Signed-off-by: Philippe Mathieu-Daudé<f4bug@amsat.org>
> ---
>   target/nios2/translate.c | 4 +---
>   1 file changed, 1 insertion(+), 3 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~

[PATCH 3/3] target/nios2: Use tcg_constant_*

[Philippe Mathieu-Daudé]

Replace uses of tcg_const_* with the allocate and free close together.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 target/nios2/translate.c | 14 ++++----------
 1 file changed, 4 insertions(+), 10 deletions(-)

diff --git a/target/nios2/translate.c b/target/nios2/translate.c
index 8524a2f6dd8..8d4a376ea84 100644
--- a/target/nios2/translate.c
+++ b/target/nios2/translate.c
@@ -134,11 +134,8 @@ static TCGv load_gpr(DisasContext *dc, uint8_t reg)
 static void t_gen_helper_raise_exception(DisasContext *dc,
                                          uint32_t index)
 {
-    TCGv_i32 tmp = tcg_const_i32(index);
-
     tcg_gen_movi_tl(cpu_R[R_PC], dc->pc);
-    gen_helper_raise_exception(cpu_env, tmp);
-    tcg_temp_free_i32(tmp);
+    gen_helper_raise_exception(cpu_env, tcg_constant_i32(index));
     dc->base.is_jmp = DISAS_NORETURN;
 }
 
@@ -448,9 +445,8 @@ static void rdctl(DisasContext *dc, uint32_t code, uint32_t flags)
         if (likely(instr.c != R_ZERO)) {
             tcg_gen_mov_tl(cpu_R[instr.c], cpu_R[instr.imm5 + CR_BASE]);
 #ifdef DEBUG_MMU
-            TCGv_i32 tmp = tcg_const_i32(instr.imm5 + CR_BASE);
-            gen_helper_mmu_read_debug(cpu_R[instr.c], cpu_env, tmp);
-            tcg_temp_free_i32(tmp);
+            gen_helper_mmu_read_debug(cpu_R[instr.c], cpu_env,
+                                      tcg_constant_i32(instr.imm5 + CR_BASE));
 #endif
         }
 #endif
@@ -613,15 +609,13 @@ static void divu(DisasContext *dc, uint32_t code, uint32_t flags)
 
     TCGv t0 = tcg_temp_new();
     TCGv t1 = tcg_temp_new();
-    TCGv t3 = tcg_const_tl(1);
 
     tcg_gen_ext32u_tl(t0, load_gpr(dc, instr.a));
     tcg_gen_ext32u_tl(t1, load_gpr(dc, instr.b));
-    tcg_gen_movcond_tl(TCG_COND_EQ, t1, t1, dc->zero, t3, t1);
+    tcg_gen_movcond_tl(TCG_COND_EQ, t1, t1, dc->zero, tcg_constant_tl(1), t1);
     tcg_gen_divu_tl(cpu_R[instr.c], t0, t1);
     tcg_gen_ext32s_tl(cpu_R[instr.c], cpu_R[instr.c]);
 
-    tcg_temp_free(t3);
     tcg_temp_free(t1);
     tcg_temp_free(t0);
 }
-- 
2.31.1

Re: [PATCH 3/3] target/nios2: Use tcg_constant_*

[Philippe Mathieu-Daudé]

On 10/3/21 01:30, Philippe Mathieu-Daudé wrote:
> Replace uses of tcg_const_* with the allocate and free close together.
> 
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
>  target/nios2/translate.c | 14 ++++----------
>  1 file changed, 4 insertions(+), 10 deletions(-)

> @@ -448,9 +445,8 @@ static void rdctl(DisasContext *dc, uint32_t code, uint32_t flags)
>          if (likely(instr.c != R_ZERO)) {
>              tcg_gen_mov_tl(cpu_R[instr.c], cpu_R[instr.imm5 + CR_BASE]);
>  #ifdef DEBUG_MMU
> -            TCGv_i32 tmp = tcg_const_i32(instr.imm5 + CR_BASE);
> -            gen_helper_mmu_read_debug(cpu_R[instr.c], cpu_env, tmp);
> -            tcg_temp_free_i32(tmp);
> +            gen_helper_mmu_read_debug(cpu_R[instr.c], cpu_env,
> +                                      tcg_constant_i32(instr.imm5 + CR_BASE));
>  #endif
>          }

I missed mmu_write() is also read-only, thus can use tcg_constant_*().

Re: [PATCH 3/3] target/nios2: Use tcg_constant_*

[Richard Henderson]

On 10/2/21 7:30 PM, Philippe Mathieu-Daudé wrote:
> Replace uses of tcg_const_* with the allocate and free close together.
> 
> Signed-off-by: Philippe Mathieu-Daudé<f4bug@amsat.org>
> ---
>   target/nios2/translate.c | 14 ++++----------
>   1 file changed, 4 insertions(+), 10 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~