From: Daniel Henrique Barboza <danielhb413@gmail.com>
To: "Cédric Le Goater" <clg@kaod.org>,
qemu-ppc@nongnu.org, qemu-devel@nongnu.org
Cc: Alexey Kardashevskiy <aik@ozlabs.ru>,
Frederic Barrat <fbarrat@linux.ibm.com>,
Greg Kurz <groug@kaod.org>,
David Gibson <david@gibson.dropbear.id.au>
Subject: Re: [PATCH v3 18/18] pnv/xive2: Add support for 8bits thread id
Date: Fri, 25 Feb 2022 13:33:47 -0300 [thread overview]
Message-ID: <e47f8ed3-bedd-1a76-701c-cf1a566efb44@gmail.com> (raw)
In-Reply-To: <20211126115349.2737605-19-clg@kaod.org>
On 11/26/21 08:53, Cédric Le Goater wrote:
> Signed-off-by: Cédric Le Goater <clg@kaod.org>
> ---
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
> include/hw/ppc/xive2.h | 1 +
> hw/intc/pnv_xive2.c | 5 +++++
> hw/intc/xive2.c | 3 ++-
> 3 files changed, 8 insertions(+), 1 deletion(-)
>
> diff --git a/include/hw/ppc/xive2.h b/include/hw/ppc/xive2.h
> index 88c3e393162d..001388ccea7a 100644
> --- a/include/hw/ppc/xive2.h
> +++ b/include/hw/ppc/xive2.h
> @@ -31,6 +31,7 @@ OBJECT_DECLARE_TYPE(Xive2Router, Xive2RouterClass, XIVE2_ROUTER);
>
> #define XIVE2_GEN1_TIMA_OS 0x00000001
> #define XIVE2_VP_SAVE_RESTORE 0x00000002
> +#define XIVE2_THREADID_8BITS 0x00000004
>
> typedef struct Xive2RouterClass {
> SysBusDeviceClass parent;
> diff --git a/hw/intc/pnv_xive2.c b/hw/intc/pnv_xive2.c
> index 6f0a63cd3d2f..5aaccaf78934 100644
> --- a/hw/intc/pnv_xive2.c
> +++ b/hw/intc/pnv_xive2.c
> @@ -438,6 +438,11 @@ static uint32_t pnv_xive2_get_config(Xive2Router *xrtr)
> cfg |= XIVE2_VP_SAVE_RESTORE;
> }
>
> + if (GETFIELD(CQ_XIVE_CFG_HYP_HARD_RANGE,
> + xive->cq_regs[CQ_XIVE_CFG >> 3]) == CQ_XIVE_CFG_THREADID_8BITS) {
> + cfg |= XIVE2_THREADID_8BITS;
> + }
> +
> return cfg;
> }
>
> diff --git a/hw/intc/xive2.c b/hw/intc/xive2.c
> index 978a0e3972e1..6b46f7021b46 100644
> --- a/hw/intc/xive2.c
> +++ b/hw/intc/xive2.c
> @@ -458,7 +458,8 @@ static uint32_t xive2_tctx_hw_cam_line(XivePresenter *xptr, XiveTCTX *tctx)
> CPUPPCState *env = &POWERPC_CPU(tctx->cs)->env;
> uint32_t pir = env->spr_cb[SPR_PIR].default_value;
> uint8_t blk = xive2_router_get_block_id(xrtr);
> - uint8_t tid_shift = 7;
> + uint8_t tid_shift =
> + xive2_router_get_config(xrtr) & XIVE2_THREADID_8BITS ? 8 : 7;
> uint8_t tid_mask = (1 << tid_shift) - 1;
>
> return xive2_nvp_cam_line(blk, 1 << tid_shift | (pir & tid_mask));
next prev parent reply other threads:[~2022-02-25 16:43 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-26 11:53 [PATCH v3 00/18] ppc/pnv: Extend the powernv10 machine Cédric Le Goater
2021-11-26 11:53 ` [PATCH v3 01/18] ppc/xive2: Introduce a XIVE2 core framework Cédric Le Goater
2022-02-25 13:44 ` Daniel Henrique Barboza
2021-11-26 11:53 ` [PATCH v3 02/18] ppc/xive2: Introduce a presenter matching routine Cédric Le Goater
2022-02-25 13:44 ` Daniel Henrique Barboza
2021-11-26 11:53 ` [PATCH v3 03/18] ppc/pnv: Add a XIVE2 controller to the POWER10 chip Cédric Le Goater
2022-02-25 14:01 ` Daniel Henrique Barboza
2021-11-26 11:53 ` [PATCH v3 04/18] ppc/pnv: Add a OCC model for POWER10 Cédric Le Goater
2021-11-26 11:53 ` [PATCH v3 05/18] ppc/pnv: Add POWER10 quads Cédric Le Goater
2021-11-26 11:53 ` [PATCH v3 06/18] ppc/pnv: Add model for POWER10 PHB5 PCIe Host bridge Cédric Le Goater
2022-02-25 14:09 ` Daniel Henrique Barboza
2021-11-26 11:53 ` [PATCH v3 07/18] ppc/pnv: Add a HOMER model to POWER10 Cédric Le Goater
2021-11-26 11:53 ` [PATCH v3 08/18] ppc/psi: Add support for StoreEOI and 64k ESB pages (POWER10) Cédric Le Goater
2022-02-25 14:11 ` Daniel Henrique Barboza
2021-11-26 11:53 ` [PATCH v3 09/18] ppc/xive2: Add support for notification injection on ESB pages Cédric Le Goater
2022-02-25 14:18 ` Daniel Henrique Barboza
2021-11-26 11:53 ` [PATCH v3 10/18] ppc/xive: Add support for PQ state bits offload Cédric Le Goater
2022-02-25 16:00 ` Daniel Henrique Barboza
2021-11-26 11:53 ` [PATCH v3 11/18] ppc/pnv: Add support for PQ offload on PHB5 Cédric Le Goater
2022-02-25 16:06 ` Daniel Henrique Barboza
2021-11-26 11:53 ` [PATCH v3 12/18] ppc/pnv: Add support for PHB5 "Address-based trigger" mode Cédric Le Goater
2022-02-25 16:11 ` Daniel Henrique Barboza
2021-11-26 11:53 ` [PATCH v3 13/18] pnv/xive2: Introduce new capability bits Cédric Le Goater
2022-02-25 16:13 ` Daniel Henrique Barboza
2021-11-26 11:53 ` [PATCH v3 14/18] ppc/pnv: add XIVE Gen2 TIMA support Cédric Le Goater
2022-02-25 16:26 ` Daniel Henrique Barboza
2021-11-26 11:53 ` [PATCH v3 15/18] pnv/xive2: Add support XIVE2 P9-compat mode (or Gen1) Cédric Le Goater
2022-02-25 16:28 ` Daniel Henrique Barboza
2021-11-26 11:53 ` [PATCH v3 16/18] xive2: Add a get_config() handler for the router configuration Cédric Le Goater
2022-02-25 16:29 ` Daniel Henrique Barboza
2021-11-26 11:53 ` [PATCH v3 17/18] pnv/xive2: Add support for automatic save&restore Cédric Le Goater
2022-02-25 16:33 ` Daniel Henrique Barboza
2021-11-26 11:53 ` [PATCH v3 18/18] pnv/xive2: Add support for 8bits thread id Cédric Le Goater
2022-02-25 16:33 ` Daniel Henrique Barboza [this message]
2022-01-11 13:34 ` [PATCH v3 00/18] ppc/pnv: Extend the powernv10 machine Daniel Henrique Barboza
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