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([2a01:e0a:59e:9d80:527b:9dff:feef:3874]) by smtp.gmail.com with ESMTPSA id af79cd13be357-794f301975fsm280582785a.64.2024.06.03.05.51.59 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 03 Jun 2024 05:52:02 -0700 (PDT) Message-ID: Date: Mon, 3 Jun 2024 14:51:58 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v6 05/19] backends/host_iommu_device: Introduce HostIOMMUDeviceCaps Content-Language: en-US To: Zhenzhong Duan , qemu-devel@nongnu.org Cc: alex.williamson@redhat.com, clg@redhat.com, mst@redhat.com, peterx@redhat.com, jasowang@redhat.com, jgg@nvidia.com, nicolinc@nvidia.com, joao.m.martins@oracle.com, clement.mathieu--drif@eviden.com, kevin.tian@intel.com, yi.l.liu@intel.com, chao.p.peng@intel.com References: <20240603061023.269738-1-zhenzhong.duan@intel.com> <20240603061023.269738-6-zhenzhong.duan@intel.com> From: Eric Auger In-Reply-To: <20240603061023.269738-6-zhenzhong.duan@intel.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=170.10.133.124; envelope-from=eric.auger@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -5 X-Spam_score: -0.6 X-Spam_bar: / X-Spam_report: (-0.6 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_SORBS_WEB=1.5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: eric.auger@redhat.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 6/3/24 08:10, Zhenzhong Duan wrote: > HostIOMMUDeviceCaps's elements map to the host IOMMU's capabilities. > Different platform IOMMU can support different elements. > > Currently only two elements, type and aw_bits, type hints the host > platform IOMMU type, i.e., INTEL vtd, ARM smmu, etc; aw_bits hints > host IOMMU address width. > > Introduce .get_cap() handler to check if HOST_IOMMU_DEVICE_CAP_XXX > is supported. > > Suggested-by: Cédric Le Goater > Signed-off-by: Zhenzhong Duan I would either squash this patch into patch 1 or if you prefer ti keep it seperated, add it just after. Eric > --- > include/sysemu/host_iommu_device.h | 37 ++++++++++++++++++++++++++++++ > 1 file changed, 37 insertions(+) > > diff --git a/include/sysemu/host_iommu_device.h b/include/sysemu/host_iommu_device.h > index 2b58a94d62..d47d1034b1 100644 > --- a/include/sysemu/host_iommu_device.h > +++ b/include/sysemu/host_iommu_device.h > @@ -15,11 +15,25 @@ > #include "qom/object.h" > #include "qapi/error.h" > > +/** > + * struct HostIOMMUDeviceCaps - Define host IOMMU device capabilities. > + * > + * @type: host platform IOMMU type. > + * > + * @aw_bits: host IOMMU address width. 0xff if no limitation. > + */ > +typedef struct HostIOMMUDeviceCaps { > + uint32_t type; > + uint8_t aw_bits; > +} HostIOMMUDeviceCaps; > + > #define TYPE_HOST_IOMMU_DEVICE "host-iommu-device" > OBJECT_DECLARE_TYPE(HostIOMMUDevice, HostIOMMUDeviceClass, HOST_IOMMU_DEVICE) > > struct HostIOMMUDevice { > Object parent_obj; > + > + HostIOMMUDeviceCaps caps; > }; > > /** > @@ -47,5 +61,28 @@ struct HostIOMMUDeviceClass { > * Returns: true on success, false on failure. > */ > bool (*realize)(HostIOMMUDevice *hiod, void *opaque, Error **errp); > + /** > + * @get_cap: check if a host IOMMU device capability is supported. > + * > + * Optional callback, if not implemented, hint not supporting query > + * of @cap. > + * > + * @hiod: pointer to a host IOMMU device instance. > + * > + * @cap: capability to check. > + * > + * @errp: pass an Error out when fails to query capability. > + * > + * Returns: <0 on failure, 0 if a @cap is unsupported, or else > + * 1 or some positive value for some special @cap, > + * i.e., HOST_IOMMU_DEVICE_CAP_AW_BITS. > + */ > + int (*get_cap)(HostIOMMUDevice *hiod, int cap, Error **errp); > }; > + > +/* > + * Host IOMMU device capability list. > + */ > +#define HOST_IOMMU_DEVICE_CAP_IOMMU_TYPE 0 > +#define HOST_IOMMU_DEVICE_CAP_AW_BITS 1 > #endif