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[88.21.68.240]) by smtp.gmail.com with ESMTPSA id s5sm1408661wro.27.2019.09.26.00.08.33 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 26 Sep 2019 00:08:34 -0700 (PDT) Subject: Re: [PATCH 07/20] spapr: Fold spapr_phb_lsi_qirq() into its single caller To: David Gibson , qemu-ppc@nongnu.org, clg@kaod.org, qemu-devel@nongnu.org References: <20190925064534.19155-1-david@gibson.dropbear.id.au> <20190925064534.19155-8-david@gibson.dropbear.id.au> From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= Openpgp: id=89C1E78F601EE86C867495CBA2A3FD6EDEADC0DE; url=http://pgp.mit.edu/pks/lookup?op=get&search=0xA2A3FD6EDEADC0DE Message-ID: Date: Thu, 26 Sep 2019 09:08:33 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.7.0 MIME-Version: 1.0 In-Reply-To: <20190925064534.19155-8-david@gibson.dropbear.id.au> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jason Wang , Riku Voipio , Laurent Vivier , groug@kaod.org, =?UTF-8?Q?Marc-Andr=c3=a9_Lureau?= , Paolo Bonzini Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 9/25/19 8:45 AM, David Gibson wrote: > No point having a two-line helper that's used exactly once, and not lik= ely > to be used anywhere else in future. >=20 > Signed-off-by: David Gibson > --- > hw/ppc/spapr_pci.c | 3 ++- > include/hw/pci-host/spapr.h | 7 ------- > 2 files changed, 2 insertions(+), 8 deletions(-) >=20 > diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c > index 7b71ad7c74..6934d506a7 100644 > --- a/hw/ppc/spapr_pci.c > +++ b/hw/ppc/spapr_pci.c > @@ -721,9 +721,10 @@ static void pci_spapr_set_irq(void *opaque, int ir= q_num, int level) > * corresponding qemu_irq. > */ > SpaprPhbState *phb =3D opaque; > + SpaprMachineState *spapr =3D SPAPR_MACHINE(qdev_get_machine()); > =20 > trace_spapr_pci_lsi_set(phb->dtbusname, irq_num, phb->lsi_table[ir= q_num].irq); > - qemu_set_irq(spapr_phb_lsi_qirq(phb, irq_num), level); > + qemu_set_irq(spapr_qirq(spapr, phb->lsi_table[irq_num].irq), level= ); > } > =20 > static PCIINTxRoute spapr_route_intx_pin_to_irq(void *opaque, int pin) > diff --git a/include/hw/pci-host/spapr.h b/include/hw/pci-host/spapr.h > index abd87605b2..23506f05d9 100644 > --- a/include/hw/pci-host/spapr.h > +++ b/include/hw/pci-host/spapr.h > @@ -128,13 +128,6 @@ struct SpaprPhbState { > #define SPAPR_PCI_NV2ATSD_WIN_SIZE (NVGPU_MAX_NUM * NVGPU_MAX_LINKS = * \ > 64 * KiB) > =20 > -static inline qemu_irq spapr_phb_lsi_qirq(struct SpaprPhbState *phb, i= nt pin) > -{ > - SpaprMachineState *spapr =3D SPAPR_MACHINE(qdev_get_machine()); > - > - return spapr_qirq(spapr, phb->lsi_table[pin].irq); > -} > - > int spapr_dt_phb(SpaprPhbState *phb, uint32_t intc_phandle, void *fdt, > uint32_t nr_msis, int *node_offset); > =20 >=20 Reviewed-by: Philippe Mathieu-Daud=C3=A9