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From: Richard Henderson <richard.henderson@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>,
	qemu-arm@nongnu.org, qemu-devel@nongnu.org
Cc: Thomas Huth <thuth@redhat.com>
Subject: Re: [PATCH 1/3] target/arm: Mark registers which call pmu_op_start() as ARM_CP_IO
Date: Wed, 28 Sep 2022 05:11:12 -0700	[thread overview]
Message-ID: <e4c42def-a1a0-25cb-c3bb-7ace33e1a9ff@linaro.org> (raw)
In-Reply-To: <20220923123412.1214041-2-peter.maydell@linaro.org>

On 9/23/22 05:34, Peter Maydell wrote:
> In commit 01765386a888 we made some system register write functions
> call pmu_op_start()/pmu_op_finish(). This means that they now touch
> timers, so for icount to work these registers must have the ARM_CP_IO
> flag set.
> 
> This fixes a bug where when icount is enabled a guest that touches
> MDCR_EL3, MDCR_EL2, PMCNTENSET_EL0 or PMCNTENCLR_EL0 would cause
> QEMU to print an error message and exit, for example:
> 
> [    2.495971] TCP: Hash tables configured (established 1024 bind 1024)
> [    2.496213] UDP hash table entries: 256 (order: 1, 8192 bytes)
> [    2.496386] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes)
> [    2.496917] NET: Registered protocol family 1
> qemu-system-aarch64: Bad icount read
> 
> Reported-by: Thomas Huth<thuth@redhat.com>
> Signed-off-by: Peter Maydell<peter.maydell@linaro.org>
> ---
>   target/arm/helper.c | 12 ++++++------
>   1 file changed, 6 insertions(+), 6 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~


  reply	other threads:[~2022-09-28 14:08 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-23 12:34 [PATCH 0/3] target/arm: Fix bugs in recent PMU changes Peter Maydell
2022-09-23 12:34 ` [PATCH 1/3] target/arm: Mark registers which call pmu_op_start() as ARM_CP_IO Peter Maydell
2022-09-28 12:11   ` Richard Henderson [this message]
2022-09-23 12:34 ` [PATCH 2/3] target/arm: Make writes to MDCR_EL3 use PMU start/finish calls Peter Maydell
2022-09-28 12:15   ` Richard Henderson
2022-09-23 12:34 ` [PATCH 3/3] target/arm: Update SDCR_VALID_MASK to include SCCD Peter Maydell
2022-09-28 12:16   ` Richard Henderson

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