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From: "Huang, Kai" <kai.huang@linux.intel.com>
To: Xiao Guangrong <guangrong.xiao@linux.intel.com>,
	pbonzini@redhat.com, imammedo@redhat.com
Cc: gleb@kernel.org, mtosatti@redhat.com, stefanha@redhat.com,
	mst@redhat.com, rth@twiddle.net, ehabkost@redhat.com,
	dan.j.williams@intel.com, kvm@vger.kernel.org,
	qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH] target-i386: add Skylake-Client cpu mode
Date: Fri, 29 Apr 2016 15:11:28 +1200	[thread overview]
Message-ID: <e61e5e2c-9e1e-bccb-457d-040681a064b5@linux.intel.com> (raw)
In-Reply-To: <1461744786-47643-1-git-send-email-guangrong.xiao@linux.intel.com>

Hi Guangrong,

How about also add SGX to Skylake?

Thanks,
-Kai

On 4/27/2016 8:13 PM, Xiao Guangrong wrote:
> From: Eduardo Habkost <ehabkost@redhat.com>
>
> Introduce Skylake-Client cpu mode which inherits the features from
> Broadwell and supports some additional features that are: MPX,
> XSAVEC, XSAVES and XGETBV1
>
> Note:
> 1. As XSAVES is disabled in upstream linux kernel by commit e88221c50
> (x86/fpu: Disable XSAVES* support for now), QEMU will complain about
> "warning: host doesn't support requested feature: CPUID.0DH:EAX.xsaves [bit 3]"
>
> 2. We will post out the patch introducing Skylake-Server mode once it
> has been verified on a Skylake Sever machine
>
> [ Xiao: largely based on Eduardo's work, introduce Skylake-Client and
>   Skylake-Server cpu modes separately. ]
>
> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
> Signed-off-by: Xiao Guangrong <guangrong.xiao@linux.intel.com>
> ---
>  target-i386/cpu.c | 39 +++++++++++++++++++++++++++++++++++++++
>  1 file changed, 39 insertions(+)
>
> diff --git a/target-i386/cpu.c b/target-i386/cpu.c
> index ddae932..2f2c647 100644
> --- a/target-i386/cpu.c
> +++ b/target-i386/cpu.c
> @@ -1228,6 +1228,45 @@ static X86CPUDefinition builtin_x86_defs[] = {
>          .model_id = "Intel Core Processor (Broadwell)",
>      },
>      {
> +        .name = "Skylake-Client",
> +        .level = 0xd,
> +        .vendor = CPUID_VENDOR_INTEL,
> +        .family = 6,
> +        .model = 94,
> +        .stepping = 3,
> +        .features[FEAT_1_EDX] =
> +            CPUID_VME | CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
> +            CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA |
> +            CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
> +            CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
> +            CPUID_DE | CPUID_FP87,
> +        .features[FEAT_1_ECX] =
> +            CPUID_EXT_AVX | CPUID_EXT_XSAVE | CPUID_EXT_AES |
> +            CPUID_EXT_POPCNT | CPUID_EXT_X2APIC | CPUID_EXT_SSE42 |
> +            CPUID_EXT_SSE41 | CPUID_EXT_CX16 | CPUID_EXT_SSSE3 |
> +            CPUID_EXT_PCLMULQDQ | CPUID_EXT_SSE3 |
> +            CPUID_EXT_TSC_DEADLINE_TIMER | CPUID_EXT_FMA | CPUID_EXT_MOVBE |
> +            CPUID_EXT_PCID | CPUID_EXT_F16C | CPUID_EXT_RDRAND,
> +        .features[FEAT_8000_0001_EDX] =
> +            CPUID_EXT2_LM | CPUID_EXT2_RDTSCP | CPUID_EXT2_NX |
> +            CPUID_EXT2_SYSCALL,
> +        .features[FEAT_8000_0001_ECX] =
> +            CPUID_EXT3_ABM | CPUID_EXT3_LAHF_LM | CPUID_EXT3_3DNOWPREFETCH,
> +        .features[FEAT_7_0_EBX] =
> +            CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 |
> +            CPUID_7_0_EBX_HLE | CPUID_7_0_EBX_AVX2 | CPUID_7_0_EBX_SMEP |
> +            CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_ERMS | CPUID_7_0_EBX_INVPCID |
> +            CPUID_7_0_EBX_RTM | CPUID_7_0_EBX_RDSEED | CPUID_7_0_EBX_ADX |
> +            CPUID_7_0_EBX_SMAP | CPUID_7_0_EBX_MPX,
> +        .features[FEAT_XSAVE] =
> +            CPUID_XSAVE_XSAVEOPT | CPUID_XSAVE_XSAVEC | CPUID_XSAVE_XSAVES |
> +            CPUID_XSAVE_XGETBV1,
> +        .features[FEAT_6_EAX] =
> +            CPUID_6_EAX_ARAT,
> +        .xlevel = 0x80000008,
> +        .model_id = "Intel Core Processor (Skylake)",
> +    },
> +    {
>          .name = "Opteron_G1",
>          .level = 5,
>          .vendor = CPUID_VENDOR_AMD,
>

  parent reply	other threads:[~2016-04-29  3:11 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-04-27  8:13 [Qemu-devel] [PATCH] target-i386: add Skylake-Client cpu mode Xiao Guangrong
2016-04-27 11:56 ` Eduardo Habkost
2016-04-28 17:34 ` Eduardo Habkost
2016-05-03  6:38   ` Xiao Guangrong
2016-05-03 16:11     ` [Qemu-devel] XSAVES in GET_SUPPORTED_CPUID (was Re: [PATCH] target-i386: add Skylake-Client cpu mode) Eduardo Habkost
2016-05-03 17:44       ` Xiao Guangrong
2016-05-03 17:53         ` Dave Hansen
2016-05-03 18:23           ` Eduardo Habkost
2016-05-03 18:29             ` Dave Hansen
2016-05-09 13:44           ` Paolo Bonzini
2016-05-12 12:03             ` Eduardo Habkost
2016-05-12 12:06               ` Paolo Bonzini
2016-05-20 21:39                 ` [Qemu-devel] [QEMU PATCH v2] target-i386: Add Skylake-Client CPU model Eduardo Habkost
2016-05-23 13:46                   ` Paolo Bonzini
2016-06-03  3:50                     ` Xiao Guangrong
2016-06-03 17:27                       ` Eduardo Habkost
2016-04-29  3:11 ` Huang, Kai [this message]
2016-04-29  3:28   ` [Qemu-devel] [PATCH] target-i386: add Skylake-Client cpu mode Xiao Guangrong

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