qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Eric Auger <eric.auger@redhat.com>
To: Yi Liu <yi.l.liu@intel.com>,
	Zhenzhong Duan <zhenzhong.duan@intel.com>,
	qemu-devel@nongnu.org
Cc: alex.williamson@redhat.com, clg@redhat.com, mst@redhat.com,
	jasowang@redhat.com, peterx@redhat.com, ddutile@redhat.com,
	jgg@nvidia.com, nicolinc@nvidia.com, joao.m.martins@oracle.com,
	clement.mathieu--drif@eviden.com, kevin.tian@intel.com,
	chao.p.peng@intel.com
Subject: Re: [PATCH v5 02/21] hw/pci: Introduce pci_device_get_viommu_cap()
Date: Wed, 27 Aug 2025 13:22:43 +0200	[thread overview]
Message-ID: <e6300798-19a6-417b-902f-57fa7ae20355@redhat.com> (raw)
In-Reply-To: <32c0a5e1-6529-4978-a0e1-32940e806dc0@intel.com>

Hi

On 8/27/25 1:13 PM, Yi Liu wrote:
> On 2025/8/22 14:40, Zhenzhong Duan wrote:
>> Introduce a new PCIIOMMUOps optional callback, get_viommu_cap() which
>> allows to retrieve capabilities exposed by a vIOMMU. The first planned
>> vIOMMU device capability is VIOMMU_CAP_HW_NESTED that advertises the
>> support of HW nested stage translation scheme. pci_device_get_viommu_cap
>> is a wrapper that can be called on a PCI device potentially protected by
>> a vIOMMU.
>>
>> get_viommu_cap() is designed to return 64bit bitmap of purely emulated
>> capabilities which are only determined by user's configuration, no host
>> capabilities involved. Reasons are:
>>
>> 1. host may has heterogeneous IOMMUs, each with different capabilities
>> 2. this is migration friendly, return value is consistent between source
>>     and target.
>> 3. host IOMMU capabilities are passed to vIOMMU through
>> set_iommu_device()
>>     interface which have to be after attach_device(), when
>> get_viommu_cap()
>>     is called in attach_device(), there is no way for vIOMMU to get host
>>     IOMMU capabilities yet, so only emulated capabilities can be
>> returned.
>>     See below sequence:
>>
>>       vfio_device_attach():
>>           iommufd_cdev_attach():
>>               pci_device_get_viommu_cap() for HW nesting cap
>>               create a nesting parent hwpt
>>               attach device to the hwpt
>>               vfio_device_hiod_create_and_realize() creating hiod
>>       ...
>>       pci_device_set_iommu_device(hiod)
>
>> Suggested-by: Yi Liu <yi.l.liu@intel.com>
>> Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com>
>> ---
>>   MAINTAINERS          |  1 +
>>   include/hw/iommu.h   | 19 +++++++++++++++++++
>>   include/hw/pci/pci.h | 25 +++++++++++++++++++++++++
>>   hw/pci/pci.c         | 11 +++++++++++
>>   4 files changed, 56 insertions(+)
>>   create mode 100644 include/hw/iommu.h
>>
>> diff --git a/MAINTAINERS b/MAINTAINERS
>> index a07086ed76..54fb878128 100644
>> --- a/MAINTAINERS
>> +++ b/MAINTAINERS
>> @@ -2305,6 +2305,7 @@ F: include/system/iommufd.h
>>   F: backends/host_iommu_device.c
>>   F: include/system/host_iommu_device.h
>>   F: include/qemu/chardev_open.h
>> +F: include/hw/iommu.h
>>   F: util/chardev_open.c
>>   F: docs/devel/vfio-iommufd.rst
>>   diff --git a/include/hw/iommu.h b/include/hw/iommu.h
>> new file mode 100644
>> index 0000000000..7dd0c11b16
>> --- /dev/null
>> +++ b/include/hw/iommu.h
>> @@ -0,0 +1,19 @@
>> +/*
>> + * General vIOMMU capabilities, flags, etc
>> + *
>> + * Copyright (C) 2025 Intel Corporation.
>> + *
>> + * SPDX-License-Identifier: GPL-2.0-or-later
>> + */
>> +
>> +#ifndef HW_IOMMU_H
>> +#define HW_IOMMU_H
>> +
>> +#include "qemu/bitops.h"
>> +
>> +enum {
>> +    /* hardware nested stage-1 page table support */
>> +    VIOMMU_CAP_HW_NESTED = BIT_ULL(0),
>
> This naming is a bit confusing. get_viommu_cap indicates it will return
> the viommu's capability while this naming is HW_NESTED. It's conflict
> with the commit message which claims only emulated capability will be
> returned.

it actually means the viommu has the code to handle HW nested case,
independently on the actual HW support.
maybe remove the "emulation" wording.

Otherwise we may also use the virtio has_feature naming?


>
> TBH. I'm hesitating to name it as get_viommu_cap. The scope is a little
> larger than what we want so far. So I'm wondering if it can be done in a
> more straightforward way. e.g. just a bool op named
> iommu_nested_wanted(). Just an example, maybe better naming. We can
> extend the op to be returning a u64 value in the future when we see
> another request on VFIO from vIOMMU.
personnally I am fine with the bitmask which looks more future proof.

besides,

Reviewed-by: Eric Auger <eric.auger@redhat.com>
>
> Regards,
> Yi Liu
>



  reply	other threads:[~2025-08-27 11:23 UTC|newest]

Thread overview: 113+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-08-22  6:40 [PATCH v5 00/21] intel_iommu: Enable stage-1 translation for passthrough device Zhenzhong Duan
2025-08-22  6:40 ` [PATCH v5 01/21] intel_iommu: Rename vtd_ce_get_rid2pasid_entry to vtd_ce_get_pasid_entry Zhenzhong Duan
2025-08-22 22:19   ` Nicolin Chen via
2025-08-25  6:01     ` Duan, Zhenzhong
2025-08-22  6:40 ` [PATCH v5 02/21] hw/pci: Introduce pci_device_get_viommu_cap() Zhenzhong Duan
2025-08-22 22:22   ` Nicolin Chen
2025-08-27 11:13   ` Yi Liu
2025-08-27 11:22     ` Eric Auger [this message]
2025-08-27 12:30       ` Yi Liu
2025-08-27 12:32         ` Eric Auger
2025-08-27 15:30           ` Nicolin Chen
2025-08-28  8:26             ` Yi Liu
2025-08-28  9:06               ` Duan, Zhenzhong
2025-08-29  1:54                 ` Duan, Zhenzhong
2025-08-29  3:26                   ` Nicolin Chen
2025-09-01  2:35                     ` Duan, Zhenzhong
2025-09-01  2:59                       ` Nicolin Chen
2025-09-01  3:31                         ` Duan, Zhenzhong
2025-08-22  6:40 ` [PATCH v5 03/21] intel_iommu: Implement get_viommu_cap() callback Zhenzhong Duan
2025-08-22 22:23   ` Nicolin Chen
2025-08-22  6:40 ` [PATCH v5 04/21] vfio: Introduce helper vfio_pci_from_vfio_device() Zhenzhong Duan
2025-08-22 22:40   ` Nicolin Chen via
2025-08-25  6:06     ` Duan, Zhenzhong
2025-08-27 11:13   ` Yi Liu
2025-08-27 11:34   ` Eric Auger
2025-09-01 16:36   ` Cédric Le Goater
2025-09-02  2:12     ` Duan, Zhenzhong
2025-08-22  6:40 ` [PATCH v5 05/21] vfio/iommufd: Force creating nested parent domain Zhenzhong Duan
2025-08-22 23:12   ` Nicolin Chen
2025-08-25  8:28     ` Duan, Zhenzhong
2025-08-27 11:51       ` Eric Auger
2025-08-27 11:48   ` Eric Auger
2025-08-28  9:53     ` Duan, Zhenzhong
2025-08-28 13:00       ` Eric Auger
2025-08-29  1:40         ` Duan, Zhenzhong
2025-08-29  3:47           ` Nicolin Chen
2025-08-22  6:40 ` [PATCH v5 06/21] hw/pci: Export pci_device_get_iommu_bus_devfn() and return bool Zhenzhong Duan
2025-08-22 23:13   ` Nicolin Chen
2025-08-27 11:14   ` Yi Liu
2025-08-22  6:40 ` [PATCH v5 07/21] intel_iommu: Introduce a new structure VTDHostIOMMUDevice Zhenzhong Duan
2025-08-22 23:17   ` Nicolin Chen
2025-08-26 17:21   ` Nicolin Chen
2025-08-27  6:45     ` Duan, Zhenzhong
2025-08-27  8:51       ` Nicolin Chen
2025-08-27 16:36     ` Eric Auger
2025-08-27 16:57       ` Nicolin Chen
2025-08-27 11:14   ` Yi Liu
2025-08-28  9:17     ` Duan, Zhenzhong
2025-08-29  2:57       ` Yi Liu
2025-08-22  6:40 ` [PATCH v5 08/21] intel_iommu: Check for compatibility with IOMMUFD backed device when x-flts=on Zhenzhong Duan
2025-08-27 11:42   ` Yi Liu
2025-08-28  9:37     ` Duan, Zhenzhong
2025-08-27 11:55   ` Eric Auger
2025-08-22  6:40 ` [PATCH v5 09/21] intel_iommu: Fail passthrough device under PCI bridge if x-flts=on Zhenzhong Duan
2025-08-28 10:33   ` Yi Liu
2025-09-01  5:14     ` Duan, Zhenzhong
2025-08-22  6:40 ` [PATCH v5 10/21] intel_iommu: Introduce two helpers vtd_as_from/to_iommu_pasid_locked Zhenzhong Duan
2025-08-28 11:36   ` Yi Liu
2025-09-01  5:33     ` Duan, Zhenzhong
2025-09-03  6:30       ` Yi Liu
2025-09-03  7:13         ` Duan, Zhenzhong
2025-08-22  6:40 ` [PATCH v5 11/21] intel_iommu: Handle PASID entry removal and update Zhenzhong Duan
2025-08-27 14:25   ` Eric Auger
2025-09-01  3:17     ` Duan, Zhenzhong
2025-08-28 12:05   ` Yi Liu
2025-09-01  3:31     ` Duan, Zhenzhong
2025-09-03  7:58       ` Yi Liu
2025-09-04  2:37         ` Duan, Zhenzhong
2025-08-22  6:40 ` [PATCH v5 12/21] intel_iommu: Handle PASID entry addition Zhenzhong Duan
2025-08-27 16:22   ` Eric Auger
2025-09-01  9:03     ` Duan, Zhenzhong
2025-09-03  8:52       ` Yi Liu
2025-09-04  2:45         ` Duan, Zhenzhong
2025-08-29  5:46   ` Yi Liu
2025-08-22  6:40 ` [PATCH v5 13/21] intel_iommu: Introduce a new pasid cache invalidation type FORCE_RESET Zhenzhong Duan
2025-08-27 16:28   ` Eric Auger
2025-08-29  5:56     ` Yi Liu
2025-09-01  9:04     ` Duan, Zhenzhong
2025-08-22  6:40 ` [PATCH v5 14/21] intel_iommu: Stick to system MR for IOMMUFD backed host device when x-fls=on Zhenzhong Duan
2025-08-27 17:14   ` Eric Auger
2025-08-29  6:06   ` Yi Liu
2025-08-22  6:40 ` [PATCH v5 15/21] intel_iommu: Bind/unbind guest page table to host Zhenzhong Duan
2025-08-28  8:37   ` Eric Auger
2025-08-29  7:05   ` Yi Liu
2025-08-22  6:40 ` [PATCH v5 16/21] intel_iommu: Replay pasid bindings after context cache invalidation Zhenzhong Duan
2025-08-28  9:43   ` Eric Auger
2025-08-29  7:35     ` Yi Liu
2025-09-01  8:11       ` Duan, Zhenzhong
2025-09-03 10:18         ` Yi Liu
2025-09-04  6:42           ` Duan, Zhenzhong
2025-08-22  6:40 ` [PATCH v5 17/21] intel_iommu: Propagate PASID-based iotlb invalidation to host Zhenzhong Duan
2025-08-28 10:00   ` Eric Auger
2025-08-28 12:11     ` Yi Liu
2025-09-01  8:32     ` Duan, Zhenzhong
2025-08-22  6:40 ` [PATCH v5 18/21] intel_iommu: Replay all pasid bindings when either SRTP or TE bit is changed Zhenzhong Duan
2025-08-28 10:02   ` Eric Auger
2025-08-22  6:40 ` [PATCH v5 19/21] vfio: Add a new element bypass_ro in VFIOContainerBase Zhenzhong Duan
2025-08-28 12:47   ` Eric Auger
2025-08-22  6:40 ` [PATCH v5 20/21] Workaround for ERRATA_772415_SPR17 Zhenzhong Duan
2025-08-22 23:55   ` Nicolin Chen
2025-08-25  9:21     ` Duan, Zhenzhong
2025-08-25 16:58       ` Nicolin Chen
2025-08-27  7:11         ` Duan, Zhenzhong
2025-08-27  8:42           ` Nicolin Chen
2025-08-27 11:56     ` Yi Liu
2025-08-27 15:09       ` Nicolin Chen
2025-08-29  8:16         ` Yi Liu
2025-08-29  8:54           ` Nicolin Chen
2025-08-22  6:40 ` [PATCH v5 21/21] intel_iommu: Enable host device when x-flts=on in scalable mode Zhenzhong Duan
2025-08-28 12:51   ` Eric Auger
2025-08-29  7:42   ` Yi Liu
2025-08-27 11:13 ` [PATCH v5 00/21] intel_iommu: Enable stage-1 translation for passthrough device Yi Liu
2025-08-28  5:53   ` Duan, Zhenzhong

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=e6300798-19a6-417b-902f-57fa7ae20355@redhat.com \
    --to=eric.auger@redhat.com \
    --cc=alex.williamson@redhat.com \
    --cc=chao.p.peng@intel.com \
    --cc=clement.mathieu--drif@eviden.com \
    --cc=clg@redhat.com \
    --cc=ddutile@redhat.com \
    --cc=jasowang@redhat.com \
    --cc=jgg@nvidia.com \
    --cc=joao.m.martins@oracle.com \
    --cc=kevin.tian@intel.com \
    --cc=mst@redhat.com \
    --cc=nicolinc@nvidia.com \
    --cc=peterx@redhat.com \
    --cc=qemu-devel@nongnu.org \
    --cc=yi.l.liu@intel.com \
    --cc=zhenzhong.duan@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).