From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
To: "David Gibson" <david@gibson.dropbear.id.au>,
"Cédric Le Goater" <clg@kaod.org>
Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org,
Marcel Apfelbaum <marcel.apfelbaum@gmail.com>,
Andrea Bolognani <abologna@redhat.com>,
"Michael S. Tsirkin" <mst@redhat.com>
Subject: Re: [Qemu-devel] [PATCH v2 1/2] ppc/pnv: Add model for Power8 PHB3 PCIe Host bridge
Date: Fri, 27 Jul 2018 18:08:46 +1000 [thread overview]
Message-ID: <e642d9da57a167aeb5ae65566dd61317fcd37d2c.camel@kernel.crashing.org> (raw)
In-Reply-To: <20180727053247.GK3694@umbus.fritz.box>
On Fri, 2018-07-27 at 15:32 +1000, David Gibson wrote:
>
> > > What is this pci bridge representing? I know PCI-e PHBs typically
> > > have a pseudo P2P bridge right under them, but isn't that represnted
> > > by the root complex above?
> >
> > This is the legacy pci bridge under the pcie bus.
>
> Ah, ok. Didn't realise there was a vanilla PCI bridge built in.
There isn't. That should probably be created by the machine.
> > Here is is the qdev hierarchy :
> >
> > dev: pnv-phb3, id ""
> > index = 0 (0x0)
> > chip-id = 0 (0x0)
> > bus: phb3-root-bus
> > type pnv-phb3-root-bus
> > dev: pnv-phb3-rc, id ""
> > power_controller_present = true
> > chassis = 0 (0x0)
> > slot = 1 (0x1)
> > port = 0 (0x0)
> > aer_log_max = 8 (0x8)
> > addr = 00.0
> > romfile = ""
> > rombar = 1 (0x1)
> > multifunction = false
> > command_serr_enable = true
> > x-pcie-lnksta-dllla = true
> > x-pcie-extcap-init = true
> > class PCI bridge, addr 00:00.0, pci id 1014:03dc (sub 0000:0000)
> > bus: pcie.0
> > type PCIE
> > dev: pci-bridge, id ""
> > chassis_nr = 128 (0x80)
> > msi = "off"
> > shpc = false
> > addr = 00.0
> > romfile = ""
> > rombar = 1 (0x1)
> > multifunction = false
> > command_serr_enable = true
> > x-pcie-lnksta-dllla = true
> > x-pcie-extcap-init = true
> > class PCI bridge, addr 00:00.0, pci id 1b36:0001 (sub 0000:0000)
> > bus: pci.0
> > type PCI
> >
> > [ ... ]
> >
> > >> +static const PropertyInfo pnv_phb3_phb_id_propinfo = {
> > >> + .name = "irq",
> > >> + .get = pnv_phb3_get_phb_id,
> > >> + .set = pnv_phb3_set_phb_id,
> > >> +};
> > >
> > > Can't you use a static DeviceProps style property for this, which is a
> > > bit simpler?
> >
> > OK. We will address user creatable PHBs in some other way. Most
> > certainly in the realize routine like you suggested.
> >
> > Thanks,
> >
> > C.
> >
>
next prev parent reply other threads:[~2018-07-27 9:36 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-06-28 8:36 [Qemu-devel] [PATCH v2 0/2] ppc/pnv: Add model for Power8 PHB3 PCIe Host bridge Cédric Le Goater
2018-06-28 8:36 ` [Qemu-devel] [PATCH v2 1/2] " Cédric Le Goater
2018-07-09 7:22 ` Cédric Le Goater
2018-07-18 6:13 ` David Gibson
2018-07-18 6:12 ` David Gibson
2018-07-18 8:03 ` Benjamin Herrenschmidt
2018-07-23 4:16 ` David Gibson
2018-07-23 23:55 ` Benjamin Herrenschmidt
2018-07-24 2:14 ` David Gibson
2018-07-24 3:49 ` Benjamin Herrenschmidt
2018-07-24 4:10 ` David Gibson
2018-07-23 21:35 ` Cédric Le Goater
2018-07-23 21:37 ` Cédric Le Goater
2018-07-24 1:29 ` David Gibson
2018-07-23 21:38 ` Cédric Le Goater
2018-07-24 12:18 ` Cédric Le Goater
2018-07-27 5:32 ` David Gibson
2018-07-27 7:33 ` Cédric Le Goater
2018-07-27 8:08 ` Benjamin Herrenschmidt [this message]
2018-07-27 8:25 ` Cédric Le Goater
2018-07-27 8:43 ` Benjamin Herrenschmidt
2018-07-27 9:19 ` Cédric Le Goater
2018-07-30 8:56 ` Cédric Le Goater
2018-07-26 9:03 ` Cédric Le Goater
2018-07-26 22:36 ` Benjamin Herrenschmidt
2018-07-27 7:16 ` Cédric Le Goater
2018-07-27 8:18 ` Benjamin Herrenschmidt
2018-06-28 8:36 ` [Qemu-devel] [PATCH v2 2/2] ppc/pnv: make the PHB3 devices user creatable Cédric Le Goater
2018-07-01 18:33 ` [Qemu-devel] [PATCH v2 0/2] ppc/pnv: Add model for Power8 PHB3 PCIe Host bridge no-reply
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