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[88.21.103.193]) by smtp.gmail.com with ESMTPSA id r23sm1212616wmh.29.2019.05.07.22.58.14 (version=TLS1_3 cipher=AEAD-AES128-GCM-SHA256 bits=128/128); Tue, 07 May 2019 22:58:15 -0700 (PDT) To: Peter Maydell , Richard Henderson References: <20190403034358.21999-1-richard.henderson@linaro.org> <20190403034358.21999-3-richard.henderson@linaro.org> From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= Openpgp: id=89C1E78F601EE86C867495CBA2A3FD6EDEADC0DE; url=http://pgp.mit.edu/pks/lookup?op=get&search=0xA2A3FD6EDEADC0DE Message-ID: Date: Wed, 8 May 2019 07:58:14 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.6.1 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.128.68 Subject: Re: [Qemu-devel] [PATCH 02/26] tcg: Add CPUClass::tlb_fill X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: QEMU Developers Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 4/29/19 7:25 PM, Peter Maydell wrote: > On Wed, 3 Apr 2019 at 04:49, Richard Henderson > wrote: >> >> This hook will replace the (user-only mode specific) handle_mmu_fault >> hook, and the (system mode specific) tlb_fill function. >> >> The handle_mmu_fault hook was written as if there was a valid >> way to recover from an mmu fault, and had 3 possible return states. >> In reality, the only valid action is to raise an exception, >> return to the main loop, and delver the SIGSEGV to the guest. > > "deliver" > > You might also mention here that all of the implementations > of handle_mmu_fault for guest architectures which support > linux-user do in fact only ever return 1. > >> >> Using the hook for system mode requires that all targets be converted, >> so for now the hook is (optionally) used only from user-only mode. >> >> Signed-off-by: Richard Henderson >> --- >> include/qom/cpu.h | 9 +++++++++ >> accel/tcg/user-exec.c | 42 ++++++++++++++---------------------------- >> 2 files changed, 23 insertions(+), 28 deletions(-) >> >> diff --git a/include/qom/cpu.h b/include/qom/cpu.h >> index 1d6099e5d4..7e96a0aed3 100644 >> --- a/include/qom/cpu.h >> +++ b/include/qom/cpu.h >> @@ -119,6 +119,12 @@ struct TranslationBlock; >> * will need to do more. If this hook is not implemented then the >> * default is to call @set_pc(tb->pc). >> * @handle_mmu_fault: Callback for handling an MMU fault. >> + * @tlb_fill: Callback for handling a softmmu tlb miss or user-only >> + * address fault. For system mode, if the access is valid, call >> + * tlb_set_page and return true; if the access is invalid, and >> + * probe is true, return false; otherwise raise an exception and >> + * do not return. For user-only mode, always raise an exception >> + * and do not return. >> * @get_phys_page_debug: Callback for obtaining a physical address. >> * @get_phys_page_attrs_debug: Callback for obtaining a physical address and the >> * associated memory transaction attributes to use for the access. >> @@ -194,6 +200,9 @@ typedef struct CPUClass { >> void (*synchronize_from_tb)(CPUState *cpu, struct TranslationBlock *tb); >> int (*handle_mmu_fault)(CPUState *cpu, vaddr address, int size, int rw, >> int mmu_index); >> + bool (*tlb_fill)(CPUState *cpu, vaddr address, int size, >> + MMUAccessType access_type, int mmu_idx, >> + bool probe, uintptr_t retaddr); >> hwaddr (*get_phys_page_debug)(CPUState *cpu, vaddr addr); >> hwaddr (*get_phys_page_attrs_debug)(CPUState *cpu, vaddr addr, >> MemTxAttrs *attrs); >> diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c >> index fa9380a380..f13c0b2b67 100644 >> --- a/accel/tcg/user-exec.c >> +++ b/accel/tcg/user-exec.c >> @@ -65,6 +65,7 @@ static inline int handle_cpu_signal(uintptr_t pc, siginfo_t *info, >> CPUClass *cc; >> int ret; >> unsigned long address = (unsigned long)info->si_addr; >> + MMUAccessType access_type; >> >> /* We must handle PC addresses from two different sources: >> * a call return address and a signal frame address. >> @@ -151,40 +152,25 @@ static inline int handle_cpu_signal(uintptr_t pc, siginfo_t *info, >> #if TARGET_LONG_BITS == 32 && HOST_LONG_BITS == 64 >> g_assert(h2g_valid(address)); >> #endif >> - >> - /* Convert forcefully to guest address space, invalid addresses >> - are still valid segv ones */ > > This comment is still valid so I don't think it should be deleted. > >> address = h2g_nocheck(address); > > Otherwise > > Reviewed-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé