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[174.21.142.130]) by smtp.gmail.com with ESMTPSA id q9-20020a056a00088900b004fe1a045e97sm16663514pfj.118.2022.04.08.16.20.34 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 08 Apr 2022 16:20:34 -0700 (PDT) Message-ID: Date: Fri, 8 Apr 2022 16:20:33 -0700 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.7.0 Subject: Re: [PATCH 03/41] hw/intc/arm_gicv3: Insist that redist region capacity matches CPU count Content-Language: en-US To: Peter Maydell , qemu-arm@nongnu.org, qemu-devel@nongnu.org References: <20220408141550.1271295-1-peter.maydell@linaro.org> <20220408141550.1271295-4-peter.maydell@linaro.org> From: Richard Henderson In-Reply-To: <20220408141550.1271295-4-peter.maydell@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::535; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x535.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marc Zyngier Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 4/8/22 07:15, Peter Maydell wrote: > Boards using the GICv3 need to configure it with both the total > number of CPUs and also the sizes of all the memory regions which > contain redistributors (one redistributor per CPU). At the moment > the GICv3 checks that the number of CPUs specified is not too many to > fit in the defined redistributor regions, but in fact the code > assumes that the two match exactly. For instance when we set the > GICR_TYPER.Last bit on the final redistributor in each region, we > assume that we don't need to consider the possibility of a region > being only half full of redistributors or even completely empty. We > also assume in gicv3_redist_read() and gicv3_redist_write() that we > can calculate the CPU index from the offset within the MemoryRegion > and that this will always be in range. > > Fortunately all the board code sets the redistributor region sizes to > exactly match the CPU count, so this isn't a visible bug. We could > in theory make the GIC code handle non-full redistributor regions, or > have it automatically reduce the provided region sizes to match the > CPU count, but the simplest thing is just to strengthen the error > check and insist that the CPU count and redistributor region size > settings match exactly, since all the board code does that anyway. > > Signed-off-by: Peter Maydell > --- > hw/intc/arm_gicv3_common.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) Reviewed-by: Richard Henderson r~