From: Auger Eric <eric.auger@redhat.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: Jean-Philippe Brucker <jean-philippe@linaro.org>,
"Michael S. Tsirkin" <mst@redhat.com>,
Robin Murphy <robin.murphy@arm.com>,
zhangfei.gao@foxmail.com, QEMU Developers <qemu-devel@nongnu.org>,
Peter Xu <peterx@redhat.com>, qemu-arm <qemu-arm@nongnu.org>,
Shameerali Kolothum Thodi <shameerali.kolothum.thodi@huawei.com>,
Will Deacon <will@kernel.org>, Rob Herring <robh@kernel.org>,
Eric Auger <eric.auger.pro@gmail.com>
Subject: Re: [PATCH RESEND 1/9] hw/arm/smmu-common: Factorize some code in smmu_ptw_64()
Date: Fri, 26 Jun 2020 15:53:42 +0200 [thread overview]
Message-ID: <e6e0080a-8d66-8dde-0179-90b95b554cca@redhat.com> (raw)
In-Reply-To: <CAFEAcA-8EjTYGb-RCp6=znbpWUS7rZZuCHTFtPSmQ6NzMM2mXg@mail.gmail.com>
Hi Peter,
On 6/25/20 4:49 PM, Peter Maydell wrote:
> On Thu, 11 Jun 2020 at 17:15, Eric Auger <eric.auger@redhat.com> wrote:
>>
>> Page and block PTE decoding can share some code. Let's
>> first handle table PTE and factorize some code shared by
>> page and block PTEs.
>>
>> Signed-off-by: Eric Auger <eric.auger@redhat.com>
>> ---
>> hw/arm/smmu-common.c | 51 ++++++++++++++++----------------------------
>> 1 file changed, 18 insertions(+), 33 deletions(-)
>>
>> diff --git a/hw/arm/smmu-common.c b/hw/arm/smmu-common.c
>> index e13a5f4a7c..f2de2be527 100644
>> --- a/hw/arm/smmu-common.c
>> +++ b/hw/arm/smmu-common.c
>> @@ -186,12 +186,12 @@ static int smmu_ptw_64(SMMUTransCfg *cfg,
>> uint64_t subpage_size = 1ULL << level_shift(level, granule_sz);
>> uint64_t mask = subpage_size - 1;
>> uint32_t offset = iova_level_offset(iova, inputsize, level, granule_sz);
>> - uint64_t pte;
>> + uint64_t pte, gpa;
>> dma_addr_t pte_addr = baseaddr + offset * sizeof(pte);
>> uint8_t ap;
>>
>> if (get_pte(baseaddr, offset, &pte, info)) {
>> - goto error;
>> + break;
>
> get_pte() fills in info->type (to SMMU_PTW_ERR_WALK_EABT) on
> error; changing this from "goto error" to "break" means we'll
> now execute the "info->type = SMMU_PTW_ERR_TRANSLATION" that
> comes between the end of the while loop and the error: label,
> overwriting the wrong error type.
Agreed.
Thanks
Eric
>
> thanks
> -- PMM
>
next prev parent reply other threads:[~2020-06-26 13:54 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-11 16:14 [PATCH RESEND 0/9] SMMUv3.2 Range-based TLB Invalidation Support Eric Auger
2020-06-11 16:14 ` [PATCH RESEND 1/9] hw/arm/smmu-common: Factorize some code in smmu_ptw_64() Eric Auger
2020-06-25 14:49 ` Peter Maydell
2020-06-26 13:53 ` Auger Eric [this message]
2020-06-11 16:14 ` [PATCH RESEND 2/9] hw/arm/smmu-common: Add IOTLB helpers Eric Auger
2020-06-25 14:54 ` Peter Maydell
2020-06-11 16:14 ` [PATCH RESEND 3/9] hw/arm/smmu: Simplify the IOTLB key format Eric Auger
2020-06-25 15:03 ` Peter Maydell
2020-06-26 13:53 ` Auger Eric
2020-06-11 16:14 ` [PATCH RESEND 4/9] hw/arm/smmu: Introduce SMMUTLBEntry for PTW and IOTLB value Eric Auger
2020-06-25 15:13 ` Peter Maydell
2020-06-11 16:14 ` [PATCH RESEND 5/9] hw/arm/smmuv3: Store the starting level in SMMUTransTableInfo Eric Auger
2020-06-25 15:15 ` Peter Maydell
2020-06-26 13:58 ` Auger Eric
2020-06-11 16:14 ` [PATCH RESEND 6/9] hw/arm/smmu-common: Manage IOTLB block entries Eric Auger
2020-06-25 15:30 ` Peter Maydell
2020-06-26 13:53 ` Auger Eric
2020-06-30 15:46 ` Auger Eric
2020-06-30 15:50 ` Peter Maydell
2020-06-30 16:29 ` Auger Eric
2020-07-02 14:39 ` Auger Eric
2020-06-11 16:14 ` [PATCH RESEND 7/9] hw/arm/smmuv3: Introduce smmuv3_s1_range_inval() helper Eric Auger
2020-06-25 15:34 ` Peter Maydell
2020-06-11 16:14 ` [PATCH RESEND 8/9] hw/arm/smmuv3: Get prepared for range invalidation Eric Auger
2020-06-25 15:43 ` Peter Maydell
2020-06-11 16:15 ` [PATCH RESEND 9/9] hw/arm/smmuv3: Advertise SMMUv3.2 " Eric Auger
2020-06-25 15:40 ` Peter Maydell
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