From: "Cédric Le Goater" <clg@redhat.com>
To: Jamin Lin <jamin_lin@aspeedtech.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Peter Maydell <peter.maydell@linaro.org>,
Steven Lee <steven_lee@aspeedtech.com>,
Troy Lee <leetroy@gmail.com>,
Andrew Jeffery <andrew@codeconstruct.com.au>,
Joel Stanley <joel@jms.id.au>,
"Michael S. Tsirkin" <mst@redhat.com>,
Marcel Apfelbaum <marcel.apfelbaum@gmail.com>,
"open list:ARM TCG CPUs" <qemu-arm@nongnu.org>,
"open list:All patches CC here" <qemu-devel@nongnu.org>
Cc: Troy Lee <troy_lee@aspeedtech.com>,
"nabihestefan@google.com" <nabihestefan@google.com>,
"wuhaotsh@google.com" <wuhaotsh@google.com>,
"titusr@google.com" <titusr@google.com>
Subject: Aspeed backlog (was Re: [SPAM] [PATCH v3 00/14] Support PCIe RC to AST2600 and AST2700)
Date: Fri, 19 Sep 2025 10:27:21 +0200 [thread overview]
Message-ID: <e77f8aa9-8c19-41f5-b8b3-073c02092180@redhat.com> (raw)
In-Reply-To: <SI2PR06MB5041840F757BD2DED8342164FC11A@SI2PR06MB5041.apcprd06.prod.outlook.com>
Hello Jamin,
>> One last thing, the list of PCI capabilities reported on real HW is a little
>> different. See below. When you have time, it would be good to adjust the
>> model if possible. It can come later.
>>
>
> Thanks for the suggestion and for reporting this issue. I’ll add it to my working queue.
> Here are the tasks currently in my queue:
>
> 1. Control coprocessor reset for AST2700
> https://patchwork.kernel.org/project/qemu-devel/cover/20250717034054.1903991-1-jamin_lin@aspeedtech.com/
This needs a rework of the co processor models. This should be QEMU 10.2
material IMO.
> 2. Analyze issue "func-arm-aspeed_ast2500 test occasionally times out"
> https://gitlab.com/qemu-project/qemu/-/issues/3117
> 3. Adjust PCIe capabilities
> 3. Support AST2700 IPC model(may require refactoring the INTC model if needed)
> 4. Support AST2700 A2 (planned for end of this year or Q1 next year)
> 5. Support AST2700 boot from BootMCU(RISC-V) instead of vbootrom, if a single binary ready.
It would be great if Troy (?) could resend the models, it's good to have
since single binary is making progress.
Also, these changes may be of interest, they need review :
- usb/uhci: Add UHCI sysbus support, and enable for AST (Guenter Roeck)
https://lore.kernel.org//qemu-devel/20241112170152.217664-1-linux@roeck-us.net
Looks really good. Needs reviewers and stakeholders.
- i3c: aspeed: Add I3C support (Joe Komlodi)
https://lore.kernel.org//qemu-devel/20250613000411.1516521-1-komlodi@google.com
Looks good overall. Needs reviewers and stakeholders.
- Add Aspeed GPIO test and Support Nuvoton Serial GPIO (Coco Li)
https://lore.kernel.org//qemu-devel/20250903213809.3779860-1-lixiaoyan@google.com
Needs reviewers
- hw/arm/aspeed: AST1700 IO expander support for (Kane-Chen-AS)
https://lore.kernel.org//qemu-devel/20250917013143.1600377-1-kane_chen@aspeedtech.com
Needs rework. I will comment more when time permits
Thanks,
C.
next prev parent reply other threads:[~2025-09-19 8:28 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-18 3:13 [PATCH v3 00/14] Support PCIe RC to AST2600 and AST2700 Jamin Lin via
2025-09-18 3:13 ` [PATCH v3 01/14] hw/pci/pci_ids: Add PCI vendor ID for ASPEED Jamin Lin via
2025-09-18 3:13 ` [PATCH v3 02/14] hw/pci-host/aspeed: Add AST2600 PCIe PHY model Jamin Lin via
2025-09-18 6:41 ` [SPAM] " Cédric Le Goater
2025-09-18 7:22 ` Jamin Lin
2025-09-18 3:13 ` [PATCH v3 03/14] hw/pci-host/aspeed: Add AST2600 PCIe config space and host bridge Jamin Lin via
2025-09-18 7:02 ` [SPAM] " Cédric Le Goater
2025-09-18 7:24 ` Jamin Lin
2025-09-18 3:13 ` [PATCH v3 04/14] hw/pci-host/aspeed: Add AST2600 PCIe Root Device support Jamin Lin via
2025-09-18 3:13 ` [PATCH v3 05/14] hw/pci-host/aspeed: Add AST2600 PCIe Root Port and make address configurable Jamin Lin via
2025-09-18 3:13 ` [PATCH v3 06/14] hw/pci-host/aspeed: Add MSI support and per-RC IOMMU address space Jamin Lin via
2025-09-18 3:13 ` [PATCH v3 07/14] hw/arm/aspeed: Wire up PCIe devices in SoC model Jamin Lin via
2025-09-18 3:13 ` [PATCH v3 08/14] hw/arm/aspeed_ast2600: Add PCIe RC support (RC_H only) Jamin Lin via
2025-09-18 7:34 ` [SPAM] " Cédric Le Goater
2025-09-18 9:47 ` Jamin Lin
2025-09-18 3:13 ` [PATCH v3 09/14] hw/pci-host/aspeed: Add AST2700 PCIe PHY Jamin Lin via
2025-09-18 3:13 ` [PATCH v3 10/14] hw/pci-host/aspeed: Add AST2700 PCIe config with dedicated H2X blocks Jamin Lin via
2025-09-18 3:13 ` [PATCH v3 11/14] hw/pci-host/aspeed: Disable Root Device and place Root Port at 00:00.0 to AST2700 Jamin Lin via
2025-09-18 3:13 ` [PATCH v3 12/14] hw/arm/aspeed_ast27x0: Introduce 3 PCIe RCs for AST2700 Jamin Lin via
2025-09-18 3:13 ` [PATCH v3 13/14] tests/functional/arm/test_aspeed_ast2600: Add PCIe and network test Jamin Lin via
2025-09-18 7:55 ` [SPAM] " Cédric Le Goater
2025-09-18 8:42 ` Jamin Lin
2025-09-18 3:13 ` [PATCH v3 14/14] tests/functional/aarch64/aspeed_ast2700: Add PCIe and network tests Jamin Lin via
2025-09-18 8:02 ` [SPAM] [PATCH v3 00/14] Support PCIe RC to AST2600 and AST2700 Cédric Le Goater
2025-09-18 9:08 ` Jamin Lin
2025-09-18 9:30 ` Cédric Le Goater
2025-09-19 3:48 ` Jamin Lin
2025-09-19 8:27 ` Cédric Le Goater [this message]
2025-09-19 9:39 ` Aspeed backlog (was Re: [SPAM] [PATCH v3 00/14] Support PCIe RC to AST2600 and AST2700) Jamin Lin
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