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[174.21.150.71]) by smtp.gmail.com with ESMTPSA id r15sm20717845pgh.39.2021.02.08.14.34.26 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 08 Feb 2021 14:34:26 -0800 (PST) Subject: Re: [RFC PATCH v2 5/6] accel/tcg: Refactor debugging tlb_assert_iotlb_entry_for_ptr_present() To: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= , =?UTF-8?Q?Alex_Benn=c3=a9e?= References: <20210207232310.2505283-1-f4bug@amsat.org> <20210207232310.2505283-6-f4bug@amsat.org> <87im73aqsq.fsf@linaro.org> <83c71866-2e28-2edb-d79d-f4f96bb765a1@amsat.org> From: Richard Henderson Message-ID: Date: Mon, 8 Feb 2021 14:34:24 -0800 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: <83c71866-2e28-2edb-d79d-f4f96bb765a1@amsat.org> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::529; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x529.google.com X-Spam_score_int: -23 X-Spam_score: -2.4 X-Spam_bar: -- X-Spam_report: (-2.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.265, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Aleksandar Rikalo , qemu-riscv@nongnu.org, Yoshinori Sato , Sagar Karandikar , Bastian Koppelmann , qemu-devel@nongnu.org, Laurent Vivier , qemu-arm@nongnu.org, Alistair Francis , Claudio Fontana , Paolo Bonzini , Palmer Dabbelt , Aurelien Jarno Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 2/8/21 5:52 AM, Philippe Mathieu-Daudé wrote: > On 2/8/21 9:42 AM, Alex Bennée wrote: >> >> Philippe Mathieu-Daudé writes: >> >>> Refactor debug code as tlb_assert_iotlb_entry_for_ptr_present() helper. >>> >>> Signed-off-by: Philippe Mathieu-Daudé >>> --- >>> What this code does is out of my league, but refactoring it allow >>> keeping tlb_addr_write() local to accel/tcg/cputlb.c in the next >>> patch. >> >> The assertion that the table entry is current is just a simple >> housekeeping one. The details of how the MTE implementation uses >> (abuses?) the iotlb entries requires a closer reading of the code. >> >>> --- >>> include/exec/exec-all.h | 9 +++++++++ >>> accel/tcg/cputlb.c | 14 ++++++++++++++ >>> target/arm/mte_helper.c | 11 ++--------- >>> target/arm/sve_helper.c | 10 ++-------- >>> 4 files changed, 27 insertions(+), 17 deletions(-) >>> >>> diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h >>> index f933c74c446..c5e8e355b7f 100644 >>> --- a/include/exec/exec-all.h >>> +++ b/include/exec/exec-all.h >>> @@ -296,6 +296,15 @@ void tlb_set_page_with_attrs(CPUState *cpu, target_ulong vaddr, >>> void tlb_set_page(CPUState *cpu, target_ulong vaddr, >>> hwaddr paddr, int prot, >>> int mmu_idx, target_ulong size); >>> + >>> +/* >>> + * Find the iotlbentry for ptr. This *must* be present in the TLB >>> + * because we just found the mapping. >>> + */ >>> +void tlb_assert_iotlb_entry_for_ptr_present(CPUArchState *env, int ptr_mmu_idx, >>> + uint64_t ptr, >>> + MMUAccessType ptr_access, >>> + uintptr_t index); >> >> Probably worth making this an empty inline for the non CONFIG_DEBUG_TCG >> case so we can eliminate the call to an empty function. > > But then we can't make tlb_addr_write() static (next patch) and > we still have to include "tcg/tcg.h" for the TCG_OVERSIZED_GUEST > definition... Certainly you can, though it's not especially pretty: #ifdef CONFIG_DEBUG_TCG void tlb_assert_iotlb_entry_for_ptr_present (CPUArchState *env, int ptr_mmu_idx, uint64_t ptr, MMUAccessType ptr_access, uintptr_t index); #else static inline void tlb_assert_iotlb_entry_for_ptr_present (CPUArchState *env, int ptr_mmu_idx, uint64_t ptr, MMUAccessType ptr_access, uintptr_t index) { } #endif r~