* [PATCH 01/15] accel/tcg: Add CPUState argument to page_unprotect
2025-04-24 1:19 [PATCH 00/15] accel/tcg: Compile tb-maint.c twice Richard Henderson
@ 2025-04-24 1:19 ` Richard Henderson
2025-04-25 19:27 ` Pierrick Bouvier
2025-04-24 1:19 ` [PATCH 02/15] accel/tcg: Add CPUState argument to tb_invalidate_phys_page_unwind Richard Henderson
` (13 subsequent siblings)
14 siblings, 1 reply; 45+ messages in thread
From: Richard Henderson @ 2025-04-24 1:19 UTC (permalink / raw)
To: qemu-devel; +Cc: Philippe Mathieu-Daudé
In the next patch, page_unprotect will need to pass
the CPUState to tb_invalidate_phys_page_unwind.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/user/page-protection.h | 2 +-
accel/tcg/user-exec.c | 8 +++++---
linux-user/elfload.c | 2 +-
3 files changed, 7 insertions(+), 5 deletions(-)
diff --git a/include/user/page-protection.h b/include/user/page-protection.h
index d5c8748d49..1de72e31e6 100644
--- a/include/user/page-protection.h
+++ b/include/user/page-protection.h
@@ -16,7 +16,7 @@
#include "exec/target_long.h"
#include "exec/translation-block.h"
-int page_unprotect(tb_page_addr_t address, uintptr_t pc);
+int page_unprotect(CPUState *cpu, tb_page_addr_t address, uintptr_t pc);
int page_get_flags(target_ulong address);
diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c
index 5eef8e7f18..90b345a0cf 100644
--- a/accel/tcg/user-exec.c
+++ b/accel/tcg/user-exec.c
@@ -128,7 +128,7 @@ MMUAccessType adjust_signal_pc(uintptr_t *pc, bool is_write)
bool handle_sigsegv_accerr_write(CPUState *cpu, sigset_t *old_set,
uintptr_t host_pc, abi_ptr guest_addr)
{
- switch (page_unprotect(guest_addr, host_pc)) {
+ switch (page_unprotect(cpu, guest_addr, host_pc)) {
case 0:
/*
* Fault not caused by a page marked unwritable to protect
@@ -584,7 +584,7 @@ bool page_check_range(target_ulong start, target_ulong len, int flags)
break;
}
/* Asking about writable, but has been protected: undo. */
- if (!page_unprotect(start, 0)) {
+ if (!page_unprotect(NULL, start, 0)) {
ret = false;
break;
}
@@ -704,11 +704,13 @@ void tb_lock_page0(tb_page_addr_t address)
* immediately exited. (We can only return 2 if the 'pc' argument is
* non-zero.)
*/
-int page_unprotect(tb_page_addr_t address, uintptr_t pc)
+int page_unprotect(CPUState *cpu, tb_page_addr_t address, uintptr_t pc)
{
PageFlagsNode *p;
bool current_tb_invalidated;
+ assert((cpu == NULL) == (pc == 0));
+
/*
* Technically this isn't safe inside a signal handler. However we
* know this only ever happens in a synchronous SEGV handler, so in
diff --git a/linux-user/elfload.c b/linux-user/elfload.c
index 99811af5e7..7519b6bcda 100644
--- a/linux-user/elfload.c
+++ b/linux-user/elfload.c
@@ -4245,7 +4245,7 @@ static int wmr_page_unprotect_regions(void *opaque, target_ulong start,
size_t step = MAX(TARGET_PAGE_SIZE, qemu_real_host_page_size());
while (1) {
- page_unprotect(start, 0);
+ page_unprotect(NULL, start, 0);
if (end - start <= step) {
break;
}
--
2.43.0
^ permalink raw reply related [flat|nested] 45+ messages in thread
* Re: [PATCH 01/15] accel/tcg: Add CPUState argument to page_unprotect
2025-04-24 1:19 ` [PATCH 01/15] accel/tcg: Add CPUState argument to page_unprotect Richard Henderson
@ 2025-04-25 19:27 ` Pierrick Bouvier
0 siblings, 0 replies; 45+ messages in thread
From: Pierrick Bouvier @ 2025-04-25 19:27 UTC (permalink / raw)
To: Richard Henderson, qemu-devel; +Cc: Philippe Mathieu-Daudé
On 4/23/25 18:19, Richard Henderson wrote:
> In the next patch, page_unprotect will need to pass
> the CPUState to tb_invalidate_phys_page_unwind.
>
> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> include/user/page-protection.h | 2 +-
> accel/tcg/user-exec.c | 8 +++++---
> linux-user/elfload.c | 2 +-
> 3 files changed, 7 insertions(+), 5 deletions(-)
>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
^ permalink raw reply [flat|nested] 45+ messages in thread
* [PATCH 02/15] accel/tcg: Add CPUState argument to tb_invalidate_phys_page_unwind
2025-04-24 1:19 [PATCH 00/15] accel/tcg: Compile tb-maint.c twice Richard Henderson
2025-04-24 1:19 ` [PATCH 01/15] accel/tcg: Add CPUState argument to page_unprotect Richard Henderson
@ 2025-04-24 1:19 ` Richard Henderson
2025-04-25 19:30 ` Pierrick Bouvier
2025-04-24 1:19 ` [PATCH 03/15] accel/tcg: Add CPUState arg to tb_invalidate_phys_page_range__locked Richard Henderson
` (12 subsequent siblings)
14 siblings, 1 reply; 45+ messages in thread
From: Richard Henderson @ 2025-04-24 1:19 UTC (permalink / raw)
To: qemu-devel; +Cc: Philippe Mathieu-Daudé
Replace existing usage of current_cpu.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
accel/tcg/tb-internal.h | 3 ++-
accel/tcg/tb-maint.c | 8 ++++----
accel/tcg/user-exec.c | 5 +++--
3 files changed, 9 insertions(+), 7 deletions(-)
diff --git a/accel/tcg/tb-internal.h b/accel/tcg/tb-internal.h
index 08538e2896..1078de6c99 100644
--- a/accel/tcg/tb-internal.h
+++ b/accel/tcg/tb-internal.h
@@ -50,6 +50,7 @@ void tb_invalidate_phys_range_fast(ram_addr_t ram_addr,
uintptr_t retaddr);
#endif /* CONFIG_SOFTMMU */
-bool tb_invalidate_phys_page_unwind(tb_page_addr_t addr, uintptr_t pc);
+bool tb_invalidate_phys_page_unwind(CPUState *cpu, tb_page_addr_t addr,
+ uintptr_t pc);
#endif
diff --git a/accel/tcg/tb-maint.c b/accel/tcg/tb-maint.c
index d479f53ae0..714dcaedc9 100644
--- a/accel/tcg/tb-maint.c
+++ b/accel/tcg/tb-maint.c
@@ -1045,7 +1045,8 @@ static void tb_invalidate_phys_page(tb_page_addr_t addr)
* TB (because it was modified by this store and the guest CPU has
* precise-SMC semantics).
*/
-bool tb_invalidate_phys_page_unwind(tb_page_addr_t addr, uintptr_t pc)
+bool tb_invalidate_phys_page_unwind(CPUState *cpu, tb_page_addr_t addr,
+ uintptr_t pc)
{
TranslationBlock *current_tb;
bool current_tb_modified;
@@ -1083,15 +1084,14 @@ bool tb_invalidate_phys_page_unwind(tb_page_addr_t addr, uintptr_t pc)
* the CPU state.
*/
current_tb_modified = true;
- cpu_restore_state_from_tb(current_cpu, current_tb, pc);
+ cpu_restore_state_from_tb(cpu, current_tb, pc);
}
tb_phys_invalidate__locked(tb);
}
if (current_tb_modified) {
/* Force execution of one insn next time. */
- CPUState *cpu = current_cpu;
- cpu->cflags_next_tb = 1 | CF_NOIRQ | curr_cflags(current_cpu);
+ cpu->cflags_next_tb = 1 | CF_NOIRQ | curr_cflags(cpu);
return true;
}
return false;
diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c
index 90b345a0cf..39b76d9654 100644
--- a/accel/tcg/user-exec.c
+++ b/accel/tcg/user-exec.c
@@ -749,7 +749,8 @@ int page_unprotect(CPUState *cpu, tb_page_addr_t address, uintptr_t pc)
len = TARGET_PAGE_SIZE;
prot = p->flags | PAGE_WRITE;
pageflags_set_clear(start, start + len - 1, PAGE_WRITE, 0);
- current_tb_invalidated = tb_invalidate_phys_page_unwind(start, pc);
+ current_tb_invalidated =
+ tb_invalidate_phys_page_unwind(cpu, start, pc);
} else {
start = address & -host_page_size;
len = host_page_size;
@@ -772,7 +773,7 @@ int page_unprotect(CPUState *cpu, tb_page_addr_t address, uintptr_t pc)
* the corresponding translated code.
*/
current_tb_invalidated |=
- tb_invalidate_phys_page_unwind(addr, pc);
+ tb_invalidate_phys_page_unwind(cpu, addr, pc);
}
}
if (prot & PAGE_EXEC) {
--
2.43.0
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH 03/15] accel/tcg: Add CPUState arg to tb_invalidate_phys_page_range__locked
2025-04-24 1:19 [PATCH 00/15] accel/tcg: Compile tb-maint.c twice Richard Henderson
2025-04-24 1:19 ` [PATCH 01/15] accel/tcg: Add CPUState argument to page_unprotect Richard Henderson
2025-04-24 1:19 ` [PATCH 02/15] accel/tcg: Add CPUState argument to tb_invalidate_phys_page_unwind Richard Henderson
@ 2025-04-24 1:19 ` Richard Henderson
2025-04-24 6:54 ` Philippe Mathieu-Daudé
2025-04-25 19:31 ` Pierrick Bouvier
2025-04-24 1:19 ` [PATCH 04/15] accel/tcg: Merge tb_invalidate_phys_range{__locked} Richard Henderson
` (11 subsequent siblings)
14 siblings, 2 replies; 45+ messages in thread
From: Richard Henderson @ 2025-04-24 1:19 UTC (permalink / raw)
To: qemu-devel
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
accel/tcg/tb-maint.c | 9 ++++++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/accel/tcg/tb-maint.c b/accel/tcg/tb-maint.c
index 714dcaedc9..e8a465c9ac 100644
--- a/accel/tcg/tb-maint.c
+++ b/accel/tcg/tb-maint.c
@@ -1100,9 +1100,12 @@ bool tb_invalidate_phys_page_unwind(CPUState *cpu, tb_page_addr_t addr,
/*
* @p must be non-NULL.
* Call with all @pages locked.
+ * If cpu may be NULL outside of a cpu context. In which case,
+ * precise_smc need not be detected.
*/
static void
-tb_invalidate_phys_page_range__locked(struct page_collection *pages,
+tb_invalidate_phys_page_range__locked(CPUState *cpu,
+ struct page_collection *pages,
PageDesc *p, tb_page_addr_t start,
tb_page_addr_t last,
uintptr_t retaddr)
@@ -1194,7 +1197,7 @@ void tb_invalidate_phys_range(tb_page_addr_t start, tb_page_addr_t last)
page_start = index << TARGET_PAGE_BITS;
page_last = page_start | ~TARGET_PAGE_MASK;
page_last = MIN(page_last, last);
- tb_invalidate_phys_page_range__locked(pages, pd,
+ tb_invalidate_phys_page_range__locked(NULL, pages, pd,
page_start, page_last, 0);
}
page_collection_unlock(pages);
@@ -1215,7 +1218,7 @@ static void tb_invalidate_phys_page_fast__locked(struct page_collection *pages,
}
assert_page_locked(p);
- tb_invalidate_phys_page_range__locked(pages, p, start, start + len - 1, ra);
+ tb_invalidate_phys_page_range__locked(NULL, pages, p, start, start + len - 1, ra);
}
/*
--
2.43.0
^ permalink raw reply related [flat|nested] 45+ messages in thread
* Re: [PATCH 03/15] accel/tcg: Add CPUState arg to tb_invalidate_phys_page_range__locked
2025-04-24 1:19 ` [PATCH 03/15] accel/tcg: Add CPUState arg to tb_invalidate_phys_page_range__locked Richard Henderson
@ 2025-04-24 6:54 ` Philippe Mathieu-Daudé
2025-04-25 19:31 ` Pierrick Bouvier
1 sibling, 0 replies; 45+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-04-24 6:54 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
On 24/4/25 03:19, Richard Henderson wrote:
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> accel/tcg/tb-maint.c | 9 ++++++---
> 1 file changed, 6 insertions(+), 3 deletions(-)
>
> diff --git a/accel/tcg/tb-maint.c b/accel/tcg/tb-maint.c
> index 714dcaedc9..e8a465c9ac 100644
> --- a/accel/tcg/tb-maint.c
> +++ b/accel/tcg/tb-maint.c
> @@ -1100,9 +1100,12 @@ bool tb_invalidate_phys_page_unwind(CPUState *cpu, tb_page_addr_t addr,
> /*
> * @p must be non-NULL.
> * Call with all @pages locked.
> + * If cpu may be NULL outside of a cpu context. In which case,
s/If cpu/@cpu/ ?
> + * precise_smc need not be detected.
> */
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH 03/15] accel/tcg: Add CPUState arg to tb_invalidate_phys_page_range__locked
2025-04-24 1:19 ` [PATCH 03/15] accel/tcg: Add CPUState arg to tb_invalidate_phys_page_range__locked Richard Henderson
2025-04-24 6:54 ` Philippe Mathieu-Daudé
@ 2025-04-25 19:31 ` Pierrick Bouvier
1 sibling, 0 replies; 45+ messages in thread
From: Pierrick Bouvier @ 2025-04-25 19:31 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
On 4/23/25 18:19, Richard Henderson wrote:
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> accel/tcg/tb-maint.c | 9 ++++++---
> 1 file changed, 6 insertions(+), 3 deletions(-)
>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
^ permalink raw reply [flat|nested] 45+ messages in thread
* [PATCH 04/15] accel/tcg: Merge tb_invalidate_phys_range{__locked}
2025-04-24 1:19 [PATCH 00/15] accel/tcg: Compile tb-maint.c twice Richard Henderson
` (2 preceding siblings ...)
2025-04-24 1:19 ` [PATCH 03/15] accel/tcg: Add CPUState arg to tb_invalidate_phys_page_range__locked Richard Henderson
@ 2025-04-24 1:19 ` Richard Henderson
2025-04-24 6:57 ` Philippe Mathieu-Daudé
2025-04-25 19:35 ` Pierrick Bouvier
2025-04-24 1:19 ` [PATCH 05/15] accel/tcg: Add CPUState arg to tb_invalidate_phys_range Richard Henderson
` (10 subsequent siblings)
14 siblings, 2 replies; 45+ messages in thread
From: Richard Henderson @ 2025-04-24 1:19 UTC (permalink / raw)
To: qemu-devel
Merge tb_invalidate_phys_page_fast__locked into its
only caller, tb_invalidate_phys_range_fast.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
accel/tcg/tb-maint.c | 36 +++++++++++-------------------------
1 file changed, 11 insertions(+), 25 deletions(-)
diff --git a/accel/tcg/tb-maint.c b/accel/tcg/tb-maint.c
index e8a465c9ac..67a2570b4c 100644
--- a/accel/tcg/tb-maint.c
+++ b/accel/tcg/tb-maint.c
@@ -1203,38 +1203,24 @@ void tb_invalidate_phys_range(tb_page_addr_t start, tb_page_addr_t last)
page_collection_unlock(pages);
}
-/*
- * Call with all @pages in the range [@start, @start + len[ locked.
- */
-static void tb_invalidate_phys_page_fast__locked(struct page_collection *pages,
- tb_page_addr_t start,
- unsigned len, uintptr_t ra)
-{
- PageDesc *p;
-
- p = page_find(start >> TARGET_PAGE_BITS);
- if (!p) {
- return;
- }
-
- assert_page_locked(p);
- tb_invalidate_phys_page_range__locked(NULL, pages, p, start, start + len - 1, ra);
-}
-
/*
* len must be <= 8 and start must be a multiple of len.
* Called via softmmu_template.h when code areas are written to with
* iothread mutex not held.
*/
-void tb_invalidate_phys_range_fast(ram_addr_t ram_addr,
- unsigned size,
- uintptr_t retaddr)
+void tb_invalidate_phys_range_fast(ram_addr_t start,
+ unsigned len, uintptr_t ra)
{
- struct page_collection *pages;
+ PageDesc *p = page_find(start >> TARGET_PAGE_BITS);
- pages = page_collection_lock(ram_addr, ram_addr + size - 1);
- tb_invalidate_phys_page_fast__locked(pages, ram_addr, size, retaddr);
- page_collection_unlock(pages);
+ if (p) {
+ ram_addr_t last = start + len - 1;
+ struct page_collection *pages = page_collection_lock(start, last);
+
+ tb_invalidate_phys_page_range__locked(NULL, pages, p,
+ start, last, ra);
+ page_collection_unlock(pages);
+ }
}
#endif /* CONFIG_USER_ONLY */
--
2.43.0
^ permalink raw reply related [flat|nested] 45+ messages in thread
* Re: [PATCH 04/15] accel/tcg: Merge tb_invalidate_phys_range{__locked}
2025-04-24 1:19 ` [PATCH 04/15] accel/tcg: Merge tb_invalidate_phys_range{__locked} Richard Henderson
@ 2025-04-24 6:57 ` Philippe Mathieu-Daudé
2025-04-25 19:35 ` Pierrick Bouvier
1 sibling, 0 replies; 45+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-04-24 6:57 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
On 24/4/25 03:19, Richard Henderson wrote:
> Merge tb_invalidate_phys_page_fast__locked into its
> only caller, tb_invalidate_phys_range_fast.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> accel/tcg/tb-maint.c | 36 +++++++++++-------------------------
> 1 file changed, 11 insertions(+), 25 deletions(-)
Clearer.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH 04/15] accel/tcg: Merge tb_invalidate_phys_range{__locked}
2025-04-24 1:19 ` [PATCH 04/15] accel/tcg: Merge tb_invalidate_phys_range{__locked} Richard Henderson
2025-04-24 6:57 ` Philippe Mathieu-Daudé
@ 2025-04-25 19:35 ` Pierrick Bouvier
1 sibling, 0 replies; 45+ messages in thread
From: Pierrick Bouvier @ 2025-04-25 19:35 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
On 4/23/25 18:19, Richard Henderson wrote:
> Merge tb_invalidate_phys_page_fast__locked into its
> only caller, tb_invalidate_phys_range_fast.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> accel/tcg/tb-maint.c | 36 +++++++++++-------------------------
> 1 file changed, 11 insertions(+), 25 deletions(-)
>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
^ permalink raw reply [flat|nested] 45+ messages in thread
* [PATCH 05/15] accel/tcg: Add CPUState arg to tb_invalidate_phys_range
2025-04-24 1:19 [PATCH 00/15] accel/tcg: Compile tb-maint.c twice Richard Henderson
` (3 preceding siblings ...)
2025-04-24 1:19 ` [PATCH 04/15] accel/tcg: Merge tb_invalidate_phys_range{__locked} Richard Henderson
@ 2025-04-24 1:19 ` Richard Henderson
2025-04-24 6:58 ` Philippe Mathieu-Daudé
2025-04-25 19:38 ` Pierrick Bouvier
2025-04-24 1:19 ` [PATCH 06/15] accel/tcg: Add CPUState arg to tb_invalidate_phys_range_fast Richard Henderson
` (9 subsequent siblings)
14 siblings, 2 replies; 45+ messages in thread
From: Richard Henderson @ 2025-04-24 1:19 UTC (permalink / raw)
To: qemu-devel
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/exec/exec-all.h | 3 ++-
accel/tcg/tb-maint.c | 10 ++++++----
accel/tcg/translate-all.c | 2 +-
accel/tcg/user-exec.c | 4 ++--
system/physmem.c | 2 +-
target/arm/helper.c | 2 +-
6 files changed, 13 insertions(+), 10 deletions(-)
diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index 944b579d91..bee3416e7e 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -122,7 +122,8 @@ int probe_access_full_mmu(CPUArchState *env, vaddr addr, int size,
/* TranslationBlock invalidate API */
void tb_phys_invalidate(TranslationBlock *tb, tb_page_addr_t page_addr);
-void tb_invalidate_phys_range(tb_page_addr_t start, tb_page_addr_t last);
+void tb_invalidate_phys_range(CPUState *cpu, tb_page_addr_t start,
+ tb_page_addr_t last);
void tb_set_jmp_target(TranslationBlock *tb, int n, uintptr_t addr);
#if !defined(CONFIG_USER_ONLY)
diff --git a/accel/tcg/tb-maint.c b/accel/tcg/tb-maint.c
index 67a2570b4c..df31322cc4 100644
--- a/accel/tcg/tb-maint.c
+++ b/accel/tcg/tb-maint.c
@@ -1012,7 +1012,8 @@ TranslationBlock *tb_link_page(TranslationBlock *tb)
* Called with mmap_lock held for user-mode emulation.
* NOTE: this function must not be called while a TB is running.
*/
-void tb_invalidate_phys_range(tb_page_addr_t start, tb_page_addr_t last)
+void tb_invalidate_phys_range(CPUState *cpu, tb_page_addr_t start,
+ tb_page_addr_t last)
{
TranslationBlock *tb;
PageForEachNext n;
@@ -1035,7 +1036,7 @@ static void tb_invalidate_phys_page(tb_page_addr_t addr)
start = addr & TARGET_PAGE_MASK;
last = addr | ~TARGET_PAGE_MASK;
- tb_invalidate_phys_range(start, last);
+ tb_invalidate_phys_range(NULL, start, last);
}
/*
@@ -1178,7 +1179,8 @@ tb_invalidate_phys_page_range__locked(CPUState *cpu,
* access: the virtual CPU will exit the current TB if code is modified inside
* this TB.
*/
-void tb_invalidate_phys_range(tb_page_addr_t start, tb_page_addr_t last)
+void tb_invalidate_phys_range(CPUState *cpu, tb_page_addr_t start,
+ tb_page_addr_t last)
{
struct page_collection *pages;
tb_page_addr_t index, index_last;
@@ -1197,7 +1199,7 @@ void tb_invalidate_phys_range(tb_page_addr_t start, tb_page_addr_t last)
page_start = index << TARGET_PAGE_BITS;
page_last = page_start | ~TARGET_PAGE_MASK;
page_last = MIN(page_last, last);
- tb_invalidate_phys_page_range__locked(NULL, pages, pd,
+ tb_invalidate_phys_page_range__locked(cpu, pages, pd,
page_start, page_last, 0);
}
page_collection_unlock(pages);
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
index c007b9a190..9bf8728064 100644
--- a/accel/tcg/translate-all.c
+++ b/accel/tcg/translate-all.c
@@ -599,7 +599,7 @@ void tb_check_watchpoint(CPUState *cpu, uintptr_t retaddr)
cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags);
addr = get_page_addr_code(env, pc);
if (addr != -1) {
- tb_invalidate_phys_range(addr, addr);
+ tb_invalidate_phys_range(cpu, addr, addr);
}
}
}
diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c
index 39b76d9654..2b12c077e9 100644
--- a/accel/tcg/user-exec.c
+++ b/accel/tcg/user-exec.c
@@ -529,7 +529,7 @@ void page_set_flags(target_ulong start, target_ulong last, int flags)
~(reset ? 0 : PAGE_STICKY));
}
if (inval_tb) {
- tb_invalidate_phys_range(start, last);
+ tb_invalidate_phys_range(NULL, start, last);
}
}
@@ -1020,7 +1020,7 @@ int cpu_memory_rw_debug(CPUState *cpu, vaddr addr,
* be under mmap_lock() in order to prevent the creation of
* another TranslationBlock in between.
*/
- tb_invalidate_phys_range(addr, addr + l - 1);
+ tb_invalidate_phys_range(NULL, addr, addr + l - 1);
written = pwrite(fd, buf, l,
(off_t)(uintptr_t)g2h_untagged(addr));
if (written != l) {
diff --git a/system/physmem.c b/system/physmem.c
index 16cf557d1a..637f2d8532 100644
--- a/system/physmem.c
+++ b/system/physmem.c
@@ -2830,7 +2830,7 @@ static void invalidate_and_set_dirty(MemoryRegion *mr, hwaddr addr,
}
if (dirty_log_mask & (1 << DIRTY_MEMORY_CODE)) {
assert(tcg_enabled());
- tb_invalidate_phys_range(addr, addr + length - 1);
+ tb_invalidate_phys_range(NULL, addr, addr + length - 1);
dirty_log_mask &= ~(1 << DIRTY_MEMORY_CODE);
}
cpu_physical_memory_set_dirty_range(addr, length, dirty_log_mask);
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 7fb6e88630..c6fd290012 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -4987,7 +4987,7 @@ static void ic_ivau_write(CPUARMState *env, const ARMCPRegInfo *ri,
mmap_lock();
- tb_invalidate_phys_range(start_address, end_address);
+ tb_invalidate_phys_range(env_cpu(env), start_address, end_address);
mmap_unlock();
}
--
2.43.0
^ permalink raw reply related [flat|nested] 45+ messages in thread
* Re: [PATCH 05/15] accel/tcg: Add CPUState arg to tb_invalidate_phys_range
2025-04-24 1:19 ` [PATCH 05/15] accel/tcg: Add CPUState arg to tb_invalidate_phys_range Richard Henderson
@ 2025-04-24 6:58 ` Philippe Mathieu-Daudé
2025-04-25 19:38 ` Pierrick Bouvier
1 sibling, 0 replies; 45+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-04-24 6:58 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
On 24/4/25 03:19, Richard Henderson wrote:
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> include/exec/exec-all.h | 3 ++-
> accel/tcg/tb-maint.c | 10 ++++++----
> accel/tcg/translate-all.c | 2 +-
> accel/tcg/user-exec.c | 4 ++--
> system/physmem.c | 2 +-
> target/arm/helper.c | 2 +-
> 6 files changed, 13 insertions(+), 10 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH 05/15] accel/tcg: Add CPUState arg to tb_invalidate_phys_range
2025-04-24 1:19 ` [PATCH 05/15] accel/tcg: Add CPUState arg to tb_invalidate_phys_range Richard Henderson
2025-04-24 6:58 ` Philippe Mathieu-Daudé
@ 2025-04-25 19:38 ` Pierrick Bouvier
1 sibling, 0 replies; 45+ messages in thread
From: Pierrick Bouvier @ 2025-04-25 19:38 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
On 4/23/25 18:19, Richard Henderson wrote:
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> include/exec/exec-all.h | 3 ++-
> accel/tcg/tb-maint.c | 10 ++++++----
> accel/tcg/translate-all.c | 2 +-
> accel/tcg/user-exec.c | 4 ++--
> system/physmem.c | 2 +-
> target/arm/helper.c | 2 +-
> 6 files changed, 13 insertions(+), 10 deletions(-)
>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
^ permalink raw reply [flat|nested] 45+ messages in thread
* [PATCH 06/15] accel/tcg: Add CPUState arg to tb_invalidate_phys_range_fast
2025-04-24 1:19 [PATCH 00/15] accel/tcg: Compile tb-maint.c twice Richard Henderson
` (4 preceding siblings ...)
2025-04-24 1:19 ` [PATCH 05/15] accel/tcg: Add CPUState arg to tb_invalidate_phys_range Richard Henderson
@ 2025-04-24 1:19 ` Richard Henderson
2025-04-24 6:58 ` Philippe Mathieu-Daudé
2025-04-25 19:39 ` Pierrick Bouvier
2025-04-24 1:19 ` [PATCH 07/15] accel/tcg: Convert TARGET_HAS_PRECISE_SMC to TCGCPUOps.precise_smc Richard Henderson
` (8 subsequent siblings)
14 siblings, 2 replies; 45+ messages in thread
From: Richard Henderson @ 2025-04-24 1:19 UTC (permalink / raw)
To: qemu-devel
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
accel/tcg/tb-internal.h | 5 ++---
accel/tcg/cputlb.c | 2 +-
accel/tcg/tb-maint.c | 4 ++--
3 files changed, 5 insertions(+), 6 deletions(-)
diff --git a/accel/tcg/tb-internal.h b/accel/tcg/tb-internal.h
index 1078de6c99..40439f03c3 100644
--- a/accel/tcg/tb-internal.h
+++ b/accel/tcg/tb-internal.h
@@ -45,9 +45,8 @@ void tb_unlock_pages(TranslationBlock *);
#endif
#ifdef CONFIG_SOFTMMU
-void tb_invalidate_phys_range_fast(ram_addr_t ram_addr,
- unsigned size,
- uintptr_t retaddr);
+void tb_invalidate_phys_range_fast(CPUState *cpu, ram_addr_t ram_addr,
+ unsigned size, uintptr_t retaddr);
#endif /* CONFIG_SOFTMMU */
bool tb_invalidate_phys_page_unwind(CPUState *cpu, tb_page_addr_t addr,
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index d9fb68d719..ed6de1e96e 100644
--- a/accel/tcg/cputlb.c
+++ b/accel/tcg/cputlb.c
@@ -1340,7 +1340,7 @@ static void notdirty_write(CPUState *cpu, vaddr mem_vaddr, unsigned size,
trace_memory_notdirty_write_access(mem_vaddr, ram_addr, size);
if (!cpu_physical_memory_get_dirty_flag(ram_addr, DIRTY_MEMORY_CODE)) {
- tb_invalidate_phys_range_fast(ram_addr, size, retaddr);
+ tb_invalidate_phys_range_fast(cpu, ram_addr, size, retaddr);
}
/*
diff --git a/accel/tcg/tb-maint.c b/accel/tcg/tb-maint.c
index df31322cc4..345a7a473a 100644
--- a/accel/tcg/tb-maint.c
+++ b/accel/tcg/tb-maint.c
@@ -1210,7 +1210,7 @@ void tb_invalidate_phys_range(CPUState *cpu, tb_page_addr_t start,
* Called via softmmu_template.h when code areas are written to with
* iothread mutex not held.
*/
-void tb_invalidate_phys_range_fast(ram_addr_t start,
+void tb_invalidate_phys_range_fast(CPUState *cpu, ram_addr_t start,
unsigned len, uintptr_t ra)
{
PageDesc *p = page_find(start >> TARGET_PAGE_BITS);
@@ -1219,7 +1219,7 @@ void tb_invalidate_phys_range_fast(ram_addr_t start,
ram_addr_t last = start + len - 1;
struct page_collection *pages = page_collection_lock(start, last);
- tb_invalidate_phys_page_range__locked(NULL, pages, p,
+ tb_invalidate_phys_page_range__locked(cpu, pages, p,
start, last, ra);
page_collection_unlock(pages);
}
--
2.43.0
^ permalink raw reply related [flat|nested] 45+ messages in thread
* Re: [PATCH 06/15] accel/tcg: Add CPUState arg to tb_invalidate_phys_range_fast
2025-04-24 1:19 ` [PATCH 06/15] accel/tcg: Add CPUState arg to tb_invalidate_phys_range_fast Richard Henderson
@ 2025-04-24 6:58 ` Philippe Mathieu-Daudé
2025-04-25 19:39 ` Pierrick Bouvier
1 sibling, 0 replies; 45+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-04-24 6:58 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
On 24/4/25 03:19, Richard Henderson wrote:
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> accel/tcg/tb-internal.h | 5 ++---
> accel/tcg/cputlb.c | 2 +-
> accel/tcg/tb-maint.c | 4 ++--
> 3 files changed, 5 insertions(+), 6 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH 06/15] accel/tcg: Add CPUState arg to tb_invalidate_phys_range_fast
2025-04-24 1:19 ` [PATCH 06/15] accel/tcg: Add CPUState arg to tb_invalidate_phys_range_fast Richard Henderson
2025-04-24 6:58 ` Philippe Mathieu-Daudé
@ 2025-04-25 19:39 ` Pierrick Bouvier
1 sibling, 0 replies; 45+ messages in thread
From: Pierrick Bouvier @ 2025-04-25 19:39 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
On 4/23/25 18:19, Richard Henderson wrote:
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> accel/tcg/tb-internal.h | 5 ++---
> accel/tcg/cputlb.c | 2 +-
> accel/tcg/tb-maint.c | 4 ++--
> 3 files changed, 5 insertions(+), 6 deletions(-)
>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
^ permalink raw reply [flat|nested] 45+ messages in thread
* [PATCH 07/15] accel/tcg: Convert TARGET_HAS_PRECISE_SMC to TCGCPUOps.precise_smc
2025-04-24 1:19 [PATCH 00/15] accel/tcg: Compile tb-maint.c twice Richard Henderson
` (5 preceding siblings ...)
2025-04-24 1:19 ` [PATCH 06/15] accel/tcg: Add CPUState arg to tb_invalidate_phys_range_fast Richard Henderson
@ 2025-04-24 1:19 ` Richard Henderson
2025-04-24 7:01 ` Philippe Mathieu-Daudé
2025-04-25 19:40 ` Pierrick Bouvier
2025-04-24 1:19 ` [PATCH 08/15] accel/tcg: Simplify CPU_TLB_DYN_MAX_BITS Richard Henderson
` (7 subsequent siblings)
14 siblings, 2 replies; 45+ messages in thread
From: Richard Henderson @ 2025-04-24 1:19 UTC (permalink / raw)
To: qemu-devel
Instead of having a compile-time TARGET_HAS_PRECISE_SMC definition,
have each target set the 'precise_smc' field in the TCGCPUOps
structure.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/accel/tcg/cpu-ops.h | 7 +++++++
include/exec/poison.h | 1 -
target/i386/cpu.h | 4 ----
target/s390x/cpu.h | 2 --
accel/tcg/tb-maint.c | 32 +++++++++++++-------------------
accel/tcg/user-exec.c | 10 +++++-----
target/i386/tcg/tcg-cpu.c | 1 +
target/s390x/cpu.c | 1 +
8 files changed, 27 insertions(+), 31 deletions(-)
diff --git a/include/accel/tcg/cpu-ops.h b/include/accel/tcg/cpu-ops.h
index 0e4352513d..60b5e97205 100644
--- a/include/accel/tcg/cpu-ops.h
+++ b/include/accel/tcg/cpu-ops.h
@@ -28,6 +28,13 @@ struct TCGCPUOps {
*/
bool mttcg_supported;
+ /**
+ * @precise_smc: Stores which modify code within the current TB force
+ * the TB to exit; the next executed instruction will see
+ * the result of the store.
+ */
+ bool precise_smc;
+
/**
* @guest_default_memory_order: default barrier that is required
* for the guest memory ordering.
diff --git a/include/exec/poison.h b/include/exec/poison.h
index bc422719d8..a779adbb7a 100644
--- a/include/exec/poison.h
+++ b/include/exec/poison.h
@@ -37,7 +37,6 @@
#pragma GCC poison TARGET_NAME
#pragma GCC poison TARGET_BIG_ENDIAN
#pragma GCC poison TCG_GUEST_DEFAULT_MO
-#pragma GCC poison TARGET_HAS_PRECISE_SMC
#pragma GCC poison TARGET_LONG_BITS
#pragma GCC poison TARGET_FMT_lx
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 9866595cd0..877df7de1f 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -35,10 +35,6 @@
#define XEN_NR_VIRQS 24
-/* support for self modifying code even if the modified instruction is
- close to the modifying instruction */
-#define TARGET_HAS_PRECISE_SMC
-
#ifdef TARGET_X86_64
#define I386_ELF_MACHINE EM_X86_64
#define ELF_MACHINE_UNAME "x86_64"
diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h
index 90f64ee20c..ee59039879 100644
--- a/target/s390x/cpu.h
+++ b/target/s390x/cpu.h
@@ -35,8 +35,6 @@
#define ELF_MACHINE_UNAME "S390X"
-#define TARGET_HAS_PRECISE_SMC
-
#define MMU_USER_IDX 0
#define S390_MAX_CPUS 248
diff --git a/accel/tcg/tb-maint.c b/accel/tcg/tb-maint.c
index 345a7a473a..581d06ebf3 100644
--- a/accel/tcg/tb-maint.c
+++ b/accel/tcg/tb-maint.c
@@ -28,6 +28,7 @@
#include "exec/mmap-lock.h"
#include "exec/tb-flush.h"
#include "exec/target_page.h"
+#include "accel/tcg/cpu-ops.h"
#include "tb-internal.h"
#include "system/tcg.h"
#include "tcg/tcg.h"
@@ -1042,9 +1043,7 @@ static void tb_invalidate_phys_page(tb_page_addr_t addr)
/*
* Called with mmap_lock held. If pc is not 0 then it indicates the
* host PC of the faulting store instruction that caused this invalidate.
- * Returns true if the caller needs to abort execution of the current
- * TB (because it was modified by this store and the guest CPU has
- * precise-SMC semantics).
+ * Returns true if the caller needs to abort execution of the current TB.
*/
bool tb_invalidate_phys_page_unwind(CPUState *cpu, tb_page_addr_t addr,
uintptr_t pc)
@@ -1059,10 +1058,7 @@ bool tb_invalidate_phys_page_unwind(CPUState *cpu, tb_page_addr_t addr,
* Without precise smc semantics, or when outside of a TB,
* we can skip to invalidate.
*/
-#ifndef TARGET_HAS_PRECISE_SMC
- pc = 0;
-#endif
- if (!pc) {
+ if (!pc || !cpu || !cpu->cc->tcg_ops->precise_smc) {
tb_invalidate_phys_page(addr);
return false;
}
@@ -1113,14 +1109,16 @@ tb_invalidate_phys_page_range__locked(CPUState *cpu,
{
TranslationBlock *tb;
PageForEachNext n;
-#ifdef TARGET_HAS_PRECISE_SMC
bool current_tb_modified = false;
- TranslationBlock *current_tb = retaddr ? tcg_tb_lookup(retaddr) : NULL;
-#endif /* TARGET_HAS_PRECISE_SMC */
+ TranslationBlock *current_tb = NULL;
/* Range may not cross a page. */
tcg_debug_assert(((start ^ last) & TARGET_PAGE_MASK) == 0);
+ if (retaddr && cpu && cpu->cc->tcg_ops->precise_smc) {
+ current_tb = tcg_tb_lookup(retaddr);
+ }
+
/*
* We remove all the TBs in the range [start, last].
* XXX: see if in some cases it could be faster to invalidate all the code
@@ -1138,8 +1136,7 @@ tb_invalidate_phys_page_range__locked(CPUState *cpu,
tb_last = tb_start + (tb_last & ~TARGET_PAGE_MASK);
}
if (!(tb_last < start || tb_start > last)) {
-#ifdef TARGET_HAS_PRECISE_SMC
- if (current_tb == tb &&
+ if (unlikely(current_tb == tb) &&
(tb_cflags(current_tb) & CF_COUNT_MASK) != 1) {
/*
* If we are modifying the current TB, we must stop
@@ -1149,9 +1146,8 @@ tb_invalidate_phys_page_range__locked(CPUState *cpu,
* restore the CPU state.
*/
current_tb_modified = true;
- cpu_restore_state_from_tb(current_cpu, current_tb, retaddr);
+ cpu_restore_state_from_tb(cpu, current_tb, retaddr);
}
-#endif /* TARGET_HAS_PRECISE_SMC */
tb_phys_invalidate__locked(tb);
}
}
@@ -1161,15 +1157,13 @@ tb_invalidate_phys_page_range__locked(CPUState *cpu,
tlb_unprotect_code(start);
}
-#ifdef TARGET_HAS_PRECISE_SMC
- if (current_tb_modified) {
+ if (unlikely(current_tb_modified)) {
page_collection_unlock(pages);
/* Force execution of one insn next time. */
- current_cpu->cflags_next_tb = 1 | CF_NOIRQ | curr_cflags(current_cpu);
+ cpu->cflags_next_tb = 1 | CF_NOIRQ | curr_cflags(cpu);
mmap_unlock();
- cpu_loop_exit_noexc(current_cpu);
+ cpu_loop_exit_noexc(cpu);
}
-#endif
}
/*
diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c
index 2b12c077e9..112292b729 100644
--- a/accel/tcg/user-exec.c
+++ b/accel/tcg/user-exec.c
@@ -733,12 +733,12 @@ int page_unprotect(CPUState *cpu, tb_page_addr_t address, uintptr_t pc)
* this thread raced with another one which got here first and
* set the page to PAGE_WRITE and did the TB invalidate for us.
*/
-#ifdef TARGET_HAS_PRECISE_SMC
- TranslationBlock *current_tb = tcg_tb_lookup(pc);
- if (current_tb) {
- current_tb_invalidated = tb_cflags(current_tb) & CF_INVALID;
+ if (pc && cpu->cc->tcg_ops->precise_smc) {
+ TranslationBlock *current_tb = tcg_tb_lookup(pc);
+ if (current_tb) {
+ current_tb_invalidated = tb_cflags(current_tb) & CF_INVALID;
+ }
}
-#endif
} else {
int host_page_size = qemu_real_host_page_size();
target_ulong start, len, i;
diff --git a/target/i386/tcg/tcg-cpu.c b/target/i386/tcg/tcg-cpu.c
index 621502c984..d441c0752e 100644
--- a/target/i386/tcg/tcg-cpu.c
+++ b/target/i386/tcg/tcg-cpu.c
@@ -126,6 +126,7 @@ static bool x86_debug_check_breakpoint(CPUState *cs)
const TCGCPUOps x86_tcg_ops = {
.mttcg_supported = true,
+ .precise_smc = true,
/*
* The x86 has a strong memory model with some store-after-load re-ordering
*/
diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c
index 41cccc1e69..e3623ad32a 100644
--- a/target/s390x/cpu.c
+++ b/target/s390x/cpu.c
@@ -346,6 +346,7 @@ void cpu_get_tb_cpu_state(CPUS390XState *env, vaddr *pc,
static const TCGCPUOps s390_tcg_ops = {
.mttcg_supported = true,
+ .precise_smc = true,
/*
* The z/Architecture has a strong memory model with some
* store-after-load re-ordering.
--
2.43.0
^ permalink raw reply related [flat|nested] 45+ messages in thread
* Re: [PATCH 07/15] accel/tcg: Convert TARGET_HAS_PRECISE_SMC to TCGCPUOps.precise_smc
2025-04-24 1:19 ` [PATCH 07/15] accel/tcg: Convert TARGET_HAS_PRECISE_SMC to TCGCPUOps.precise_smc Richard Henderson
@ 2025-04-24 7:01 ` Philippe Mathieu-Daudé
2025-04-25 19:40 ` Pierrick Bouvier
1 sibling, 0 replies; 45+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-04-24 7:01 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
On 24/4/25 03:19, Richard Henderson wrote:
> Instead of having a compile-time TARGET_HAS_PRECISE_SMC definition,
> have each target set the 'precise_smc' field in the TCGCPUOps
> structure.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> include/accel/tcg/cpu-ops.h | 7 +++++++
> include/exec/poison.h | 1 -
> target/i386/cpu.h | 4 ----
> target/s390x/cpu.h | 2 --
> accel/tcg/tb-maint.c | 32 +++++++++++++-------------------
> accel/tcg/user-exec.c | 10 +++++-----
> target/i386/tcg/tcg-cpu.c | 1 +
> target/s390x/cpu.c | 1 +
> 8 files changed, 27 insertions(+), 31 deletions(-)
Nice!
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH 07/15] accel/tcg: Convert TARGET_HAS_PRECISE_SMC to TCGCPUOps.precise_smc
2025-04-24 1:19 ` [PATCH 07/15] accel/tcg: Convert TARGET_HAS_PRECISE_SMC to TCGCPUOps.precise_smc Richard Henderson
2025-04-24 7:01 ` Philippe Mathieu-Daudé
@ 2025-04-25 19:40 ` Pierrick Bouvier
1 sibling, 0 replies; 45+ messages in thread
From: Pierrick Bouvier @ 2025-04-25 19:40 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
On 4/23/25 18:19, Richard Henderson wrote:
> Instead of having a compile-time TARGET_HAS_PRECISE_SMC definition,
> have each target set the 'precise_smc' field in the TCGCPUOps
> structure.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> include/accel/tcg/cpu-ops.h | 7 +++++++
> include/exec/poison.h | 1 -
> target/i386/cpu.h | 4 ----
> target/s390x/cpu.h | 2 --
> accel/tcg/tb-maint.c | 32 +++++++++++++-------------------
> accel/tcg/user-exec.c | 10 +++++-----
> target/i386/tcg/tcg-cpu.c | 1 +
> target/s390x/cpu.c | 1 +
> 8 files changed, 27 insertions(+), 31 deletions(-)
>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
^ permalink raw reply [flat|nested] 45+ messages in thread
* [PATCH 08/15] accel/tcg: Simplify CPU_TLB_DYN_MAX_BITS
2025-04-24 1:19 [PATCH 00/15] accel/tcg: Compile tb-maint.c twice Richard Henderson
` (6 preceding siblings ...)
2025-04-24 1:19 ` [PATCH 07/15] accel/tcg: Convert TARGET_HAS_PRECISE_SMC to TCGCPUOps.precise_smc Richard Henderson
@ 2025-04-24 1:19 ` Richard Henderson
2025-04-25 19:41 ` Pierrick Bouvier
2025-04-24 1:19 ` [PATCH 09/15] accel/tcg: Simplify L1_MAP_ADDR_SPACE_BITS Richard Henderson
` (6 subsequent siblings)
14 siblings, 1 reply; 45+ messages in thread
From: Richard Henderson @ 2025-04-24 1:19 UTC (permalink / raw)
To: qemu-devel
Stop taking TARGET_VIRT_ADDR_SPACE_BITS into account.
Since we currently bound CPU_TLB_DYN_MAX_BITS to 22,
the new bound with a 4k page size is 20, which isn't
so different.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
accel/tcg/tlb-bounds.h | 21 +--------------------
1 file changed, 1 insertion(+), 20 deletions(-)
diff --git a/accel/tcg/tlb-bounds.h b/accel/tcg/tlb-bounds.h
index efd34d4793..f83d9ac9ee 100644
--- a/accel/tcg/tlb-bounds.h
+++ b/accel/tcg/tlb-bounds.h
@@ -7,26 +7,7 @@
#define ACCEL_TCG_TLB_BOUNDS_H
#define CPU_TLB_DYN_MIN_BITS 6
+#define CPU_TLB_DYN_MAX_BITS (32 - TARGET_PAGE_BITS)
#define CPU_TLB_DYN_DEFAULT_BITS 8
-# if HOST_LONG_BITS == 32
-/* Make sure we do not require a double-word shift for the TLB load */
-# define CPU_TLB_DYN_MAX_BITS (32 - TARGET_PAGE_BITS)
-# else /* HOST_LONG_BITS == 64 */
-/*
- * Assuming TARGET_PAGE_BITS==12, with 2**22 entries we can cover 2**(22+12) ==
- * 2**34 == 16G of address space. This is roughly what one would expect a
- * TLB to cover in a modern (as of 2018) x86_64 CPU. For instance, Intel
- * Skylake's Level-2 STLB has 16 1G entries.
- * Also, make sure we do not size the TLB past the guest's address space.
- */
-# ifdef TARGET_PAGE_BITS_VARY
-# define CPU_TLB_DYN_MAX_BITS \
- MIN(22, TARGET_VIRT_ADDR_SPACE_BITS - TARGET_PAGE_BITS)
-# else
-# define CPU_TLB_DYN_MAX_BITS \
- MIN_CONST(22, TARGET_VIRT_ADDR_SPACE_BITS - TARGET_PAGE_BITS)
-# endif
-# endif
-
#endif /* ACCEL_TCG_TLB_BOUNDS_H */
--
2.43.0
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH 09/15] accel/tcg: Simplify L1_MAP_ADDR_SPACE_BITS
2025-04-24 1:19 [PATCH 00/15] accel/tcg: Compile tb-maint.c twice Richard Henderson
` (7 preceding siblings ...)
2025-04-24 1:19 ` [PATCH 08/15] accel/tcg: Simplify CPU_TLB_DYN_MAX_BITS Richard Henderson
@ 2025-04-24 1:19 ` Richard Henderson
2025-04-25 19:42 ` Pierrick Bouvier
2025-04-24 1:19 ` [PATCH 10/15] accel/tcg: Merge internal-target.h into internal-common.h Richard Henderson
` (5 subsequent siblings)
14 siblings, 1 reply; 45+ messages in thread
From: Richard Henderson @ 2025-04-24 1:19 UTC (permalink / raw)
To: qemu-devel
Stop taking TARGET_PHYS_ADDR_SPACE_BITS into account.
Simply allow the entire ram_addr_t space.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
accel/tcg/tb-maint.c | 6 +-----
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/accel/tcg/tb-maint.c b/accel/tcg/tb-maint.c
index 581d06ebf3..f43f5342a6 100644
--- a/accel/tcg/tb-maint.c
+++ b/accel/tcg/tb-maint.c
@@ -160,11 +160,7 @@ static PageForEachNext foreach_tb_next(PageForEachNext tb,
/*
* In system mode we want L1_MAP to be based on ram offsets.
*/
-#if HOST_LONG_BITS < TARGET_PHYS_ADDR_SPACE_BITS
-# define L1_MAP_ADDR_SPACE_BITS HOST_LONG_BITS
-#else
-# define L1_MAP_ADDR_SPACE_BITS TARGET_PHYS_ADDR_SPACE_BITS
-#endif
+#define L1_MAP_ADDR_SPACE_BITS HOST_LONG_BITS
/* Size of the L2 (and L3, etc) page tables. */
#define V_L2_BITS 10
--
2.43.0
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH 10/15] accel/tcg: Merge internal-target.h into internal-common.h
2025-04-24 1:19 [PATCH 00/15] accel/tcg: Compile tb-maint.c twice Richard Henderson
` (8 preceding siblings ...)
2025-04-24 1:19 ` [PATCH 09/15] accel/tcg: Simplify L1_MAP_ADDR_SPACE_BITS Richard Henderson
@ 2025-04-24 1:19 ` Richard Henderson
2025-04-24 7:02 ` Philippe Mathieu-Daudé
2025-04-25 19:42 ` Pierrick Bouvier
2025-04-24 1:19 ` [PATCH 11/15] accel/tcg: Reduce scope of tb_phys_invalidate, tb_set_jmp_target Richard Henderson
` (4 subsequent siblings)
14 siblings, 2 replies; 45+ messages in thread
From: Richard Henderson @ 2025-04-24 1:19 UTC (permalink / raw)
To: qemu-devel
There's nothing left in internal-target.h that is
target specific.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
accel/tcg/internal-common.h | 29 +++++++++++++++++++++++
accel/tcg/internal-target.h | 46 -------------------------------------
accel/tcg/cpu-exec.c | 1 -
accel/tcg/cputlb.c | 1 -
accel/tcg/tb-maint.c | 1 -
accel/tcg/translate-all.c | 1 -
accel/tcg/user-exec.c | 1 -
7 files changed, 29 insertions(+), 51 deletions(-)
delete mode 100644 accel/tcg/internal-target.h
diff --git a/accel/tcg/internal-common.h b/accel/tcg/internal-common.h
index 2f00560d10..573e8438c3 100644
--- a/accel/tcg/internal-common.h
+++ b/accel/tcg/internal-common.h
@@ -11,6 +11,7 @@
#include "exec/cpu-common.h"
#include "exec/translation-block.h"
+#include "exec/mmap-lock.h"
extern int64_t max_delay;
extern int64_t max_advance;
@@ -108,4 +109,32 @@ static inline tb_page_addr_t get_page_addr_code(CPUArchState *env,
return get_page_addr_code_hostp(env, addr, NULL);
}
+/*
+ * Access to the various translations structures need to be serialised
+ * via locks for consistency. In user-mode emulation access to the
+ * memory related structures are protected with mmap_lock.
+ * In !user-mode we use per-page locks.
+ */
+#ifdef CONFIG_USER_ONLY
+#define assert_memory_lock() tcg_debug_assert(have_mmap_lock())
+#else
+#define assert_memory_lock()
+#endif
+
+#if defined(CONFIG_SOFTMMU) && defined(CONFIG_DEBUG_TCG)
+void assert_no_pages_locked(void);
+#else
+static inline void assert_no_pages_locked(void) { }
+#endif
+
+#ifdef CONFIG_USER_ONLY
+static inline void page_table_config_init(void) { }
+#else
+void page_table_config_init(void);
+#endif
+
+#ifndef CONFIG_USER_ONLY
+G_NORETURN void cpu_io_recompile(CPUState *cpu, uintptr_t retaddr);
+#endif /* CONFIG_USER_ONLY */
+
#endif
diff --git a/accel/tcg/internal-target.h b/accel/tcg/internal-target.h
deleted file mode 100644
index 9a9cef3140..0000000000
--- a/accel/tcg/internal-target.h
+++ /dev/null
@@ -1,46 +0,0 @@
-/*
- * Internal execution defines for qemu (target specific)
- *
- * Copyright (c) 2003 Fabrice Bellard
- *
- * SPDX-License-Identifier: LGPL-2.1-or-later
- */
-
-#ifndef ACCEL_TCG_INTERNAL_TARGET_H
-#define ACCEL_TCG_INTERNAL_TARGET_H
-
-#include "cpu-param.h"
-#include "exec/exec-all.h"
-#include "exec/translation-block.h"
-#include "tb-internal.h"
-#include "exec/mmap-lock.h"
-
-/*
- * Access to the various translations structures need to be serialised
- * via locks for consistency. In user-mode emulation access to the
- * memory related structures are protected with mmap_lock.
- * In !user-mode we use per-page locks.
- */
-#ifdef CONFIG_USER_ONLY
-#define assert_memory_lock() tcg_debug_assert(have_mmap_lock())
-#else
-#define assert_memory_lock()
-#endif
-
-#if defined(CONFIG_SOFTMMU) && defined(CONFIG_DEBUG_TCG)
-void assert_no_pages_locked(void);
-#else
-static inline void assert_no_pages_locked(void) { }
-#endif
-
-#ifdef CONFIG_USER_ONLY
-static inline void page_table_config_init(void) { }
-#else
-void page_table_config_init(void);
-#endif
-
-#ifndef CONFIG_USER_ONLY
-G_NORETURN void cpu_io_recompile(CPUState *cpu, uintptr_t retaddr);
-#endif /* CONFIG_USER_ONLY */
-
-#endif /* ACCEL_TCG_INTERNAL_H */
diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c
index b00f046b29..4f1955d3d8 100644
--- a/accel/tcg/cpu-exec.c
+++ b/accel/tcg/cpu-exec.c
@@ -46,7 +46,6 @@
#include "tb-context.h"
#include "tb-internal.h"
#include "internal-common.h"
-#include "internal-target.h"
/* -icount align implementation. */
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index ed6de1e96e..ca69128232 100644
--- a/accel/tcg/cputlb.c
+++ b/accel/tcg/cputlb.c
@@ -43,7 +43,6 @@
#include "tb-internal.h"
#include "tlb-bounds.h"
#include "internal-common.h"
-#include "internal-target.h"
#ifdef CONFIG_PLUGIN
#include "qemu/plugin-memory.h"
#endif
diff --git a/accel/tcg/tb-maint.c b/accel/tcg/tb-maint.c
index f43f5342a6..cf12a28eab 100644
--- a/accel/tcg/tb-maint.c
+++ b/accel/tcg/tb-maint.c
@@ -36,7 +36,6 @@
#include "tb-context.h"
#include "tb-internal.h"
#include "internal-common.h"
-#include "internal-target.h"
#ifdef CONFIG_USER_ONLY
#include "user/page-protection.h"
#endif
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
index 9bf8728064..38819a507b 100644
--- a/accel/tcg/translate-all.c
+++ b/accel/tcg/translate-all.c
@@ -66,7 +66,6 @@
#include "tb-context.h"
#include "tb-internal.h"
#include "internal-common.h"
-#include "internal-target.h"
#include "tcg/perf.h"
#include "tcg/insn-start-words.h"
#include "cpu.h"
diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c
index 112292b729..17e3be337f 100644
--- a/accel/tcg/user-exec.c
+++ b/accel/tcg/user-exec.c
@@ -39,7 +39,6 @@
#include "tcg/tcg-ldst.h"
#include "backend-ldst.h"
#include "internal-common.h"
-#include "internal-target.h"
#include "tb-internal.h"
__thread uintptr_t helper_retaddr;
--
2.43.0
^ permalink raw reply related [flat|nested] 45+ messages in thread
* Re: [PATCH 10/15] accel/tcg: Merge internal-target.h into internal-common.h
2025-04-24 1:19 ` [PATCH 10/15] accel/tcg: Merge internal-target.h into internal-common.h Richard Henderson
@ 2025-04-24 7:02 ` Philippe Mathieu-Daudé
2025-04-25 19:42 ` Pierrick Bouvier
1 sibling, 0 replies; 45+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-04-24 7:02 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
On 24/4/25 03:19, Richard Henderson wrote:
> There's nothing left in internal-target.h that is
> target specific.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> accel/tcg/internal-common.h | 29 +++++++++++++++++++++++
> accel/tcg/internal-target.h | 46 -------------------------------------
> accel/tcg/cpu-exec.c | 1 -
> accel/tcg/cputlb.c | 1 -
> accel/tcg/tb-maint.c | 1 -
> accel/tcg/translate-all.c | 1 -
> accel/tcg/user-exec.c | 1 -
> 7 files changed, 29 insertions(+), 51 deletions(-)
> delete mode 100644 accel/tcg/internal-target.h
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH 10/15] accel/tcg: Merge internal-target.h into internal-common.h
2025-04-24 1:19 ` [PATCH 10/15] accel/tcg: Merge internal-target.h into internal-common.h Richard Henderson
2025-04-24 7:02 ` Philippe Mathieu-Daudé
@ 2025-04-25 19:42 ` Pierrick Bouvier
1 sibling, 0 replies; 45+ messages in thread
From: Pierrick Bouvier @ 2025-04-25 19:42 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
On 4/23/25 18:19, Richard Henderson wrote:
> There's nothing left in internal-target.h that is
> target specific.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> accel/tcg/internal-common.h | 29 +++++++++++++++++++++++
> accel/tcg/internal-target.h | 46 -------------------------------------
> accel/tcg/cpu-exec.c | 1 -
> accel/tcg/cputlb.c | 1 -
> accel/tcg/tb-maint.c | 1 -
> accel/tcg/translate-all.c | 1 -
> accel/tcg/user-exec.c | 1 -
> 7 files changed, 29 insertions(+), 51 deletions(-)
> delete mode 100644 accel/tcg/internal-target.h
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
^ permalink raw reply [flat|nested] 45+ messages in thread
* [PATCH 11/15] accel/tcg: Reduce scope of tb_phys_invalidate, tb_set_jmp_target
2025-04-24 1:19 [PATCH 00/15] accel/tcg: Compile tb-maint.c twice Richard Henderson
` (9 preceding siblings ...)
2025-04-24 1:19 ` [PATCH 10/15] accel/tcg: Merge internal-target.h into internal-common.h Richard Henderson
@ 2025-04-24 1:19 ` Richard Henderson
2025-04-24 7:03 ` Philippe Mathieu-Daudé
2025-04-25 19:43 ` Pierrick Bouvier
2025-04-24 1:19 ` [PATCH 12/15] accel/tcg: Use vaddr for walk_memory_regions callback Richard Henderson
` (3 subsequent siblings)
14 siblings, 2 replies; 45+ messages in thread
From: Richard Henderson @ 2025-04-24 1:19 UTC (permalink / raw)
To: qemu-devel
Move the declarations of these functions out of exec/exec-all.h
to accel/tcg/internal-common.h.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
accel/tcg/internal-common.h | 3 +++
include/exec/exec-all.h | 2 --
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/accel/tcg/internal-common.h b/accel/tcg/internal-common.h
index 573e8438c3..98c702422f 100644
--- a/accel/tcg/internal-common.h
+++ b/accel/tcg/internal-common.h
@@ -137,4 +137,7 @@ void page_table_config_init(void);
G_NORETURN void cpu_io_recompile(CPUState *cpu, uintptr_t retaddr);
#endif /* CONFIG_USER_ONLY */
+void tb_phys_invalidate(TranslationBlock *tb, tb_page_addr_t page_addr);
+void tb_set_jmp_target(TranslationBlock *tb, int n, uintptr_t addr);
+
#endif
diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index bee3416e7e..24383b6aba 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -121,10 +121,8 @@ int probe_access_full_mmu(CPUArchState *env, vaddr addr, int size,
#endif /* CONFIG_TCG */
/* TranslationBlock invalidate API */
-void tb_phys_invalidate(TranslationBlock *tb, tb_page_addr_t page_addr);
void tb_invalidate_phys_range(CPUState *cpu, tb_page_addr_t start,
tb_page_addr_t last);
-void tb_set_jmp_target(TranslationBlock *tb, int n, uintptr_t addr);
#if !defined(CONFIG_USER_ONLY)
--
2.43.0
^ permalink raw reply related [flat|nested] 45+ messages in thread
* Re: [PATCH 11/15] accel/tcg: Reduce scope of tb_phys_invalidate, tb_set_jmp_target
2025-04-24 1:19 ` [PATCH 11/15] accel/tcg: Reduce scope of tb_phys_invalidate, tb_set_jmp_target Richard Henderson
@ 2025-04-24 7:03 ` Philippe Mathieu-Daudé
2025-04-25 19:43 ` Pierrick Bouvier
1 sibling, 0 replies; 45+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-04-24 7:03 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
On 24/4/25 03:19, Richard Henderson wrote:
> Move the declarations of these functions out of exec/exec-all.h
> to accel/tcg/internal-common.h.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> accel/tcg/internal-common.h | 3 +++
> include/exec/exec-all.h | 2 --
> 2 files changed, 3 insertions(+), 2 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH 11/15] accel/tcg: Reduce scope of tb_phys_invalidate, tb_set_jmp_target
2025-04-24 1:19 ` [PATCH 11/15] accel/tcg: Reduce scope of tb_phys_invalidate, tb_set_jmp_target Richard Henderson
2025-04-24 7:03 ` Philippe Mathieu-Daudé
@ 2025-04-25 19:43 ` Pierrick Bouvier
1 sibling, 0 replies; 45+ messages in thread
From: Pierrick Bouvier @ 2025-04-25 19:43 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
On 4/23/25 18:19, Richard Henderson wrote:
> Move the declarations of these functions out of exec/exec-all.h
> to accel/tcg/internal-common.h.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> accel/tcg/internal-common.h | 3 +++
> include/exec/exec-all.h | 2 --
> 2 files changed, 3 insertions(+), 2 deletions(-)
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
^ permalink raw reply [flat|nested] 45+ messages in thread
* [PATCH 12/15] accel/tcg: Use vaddr for walk_memory_regions callback
2025-04-24 1:19 [PATCH 00/15] accel/tcg: Compile tb-maint.c twice Richard Henderson
` (10 preceding siblings ...)
2025-04-24 1:19 ` [PATCH 11/15] accel/tcg: Reduce scope of tb_phys_invalidate, tb_set_jmp_target Richard Henderson
@ 2025-04-24 1:19 ` Richard Henderson
2025-04-24 7:05 ` Philippe Mathieu-Daudé
` (2 more replies)
2025-04-24 1:19 ` [PATCH 13/15] accel/tcg: Use vaddr in user/page-protection.h Richard Henderson
` (2 subsequent siblings)
14 siblings, 3 replies; 45+ messages in thread
From: Richard Henderson @ 2025-04-24 1:19 UTC (permalink / raw)
To: qemu-devel
Use vaddr instead of target_ulong. At the same time,
use int instead of unsigned long for flags, to match
page_set_flags().
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/user/page-protection.h | 4 +---
accel/tcg/user-exec.c | 10 +++++-----
linux-user/elfload.c | 19 +++++++++----------
linux-user/syscall.c | 8 ++++----
4 files changed, 19 insertions(+), 22 deletions(-)
diff --git a/include/user/page-protection.h b/include/user/page-protection.h
index 1de72e31e6..55aa05ce24 100644
--- a/include/user/page-protection.h
+++ b/include/user/page-protection.h
@@ -88,9 +88,7 @@ target_ulong page_find_range_empty(target_ulong min, target_ulong max,
__attribute__((returns_nonnull))
void *page_get_target_data(target_ulong address);
-typedef int (*walk_memory_regions_fn)(void *, target_ulong,
- target_ulong, unsigned long);
-
+typedef int (*walk_memory_regions_fn)(void *, vaddr, vaddr, int);
int walk_memory_regions(void *, walk_memory_regions_fn);
void page_dump(FILE *f);
diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c
index 17e3be337f..25d86567e7 100644
--- a/accel/tcg/user-exec.c
+++ b/accel/tcg/user-exec.c
@@ -199,13 +199,13 @@ int walk_memory_regions(void *priv, walk_memory_regions_fn fn)
return rc;
}
-static int dump_region(void *priv, target_ulong start,
- target_ulong end, unsigned long prot)
+static int dump_region(void *opaque, vaddr start, vaddr end, int prot)
{
- FILE *f = (FILE *)priv;
+ FILE *f = opaque;
- fprintf(f, TARGET_FMT_lx"-"TARGET_FMT_lx" "TARGET_FMT_lx" %c%c%c\n",
- start, end, end - start,
+ fprintf(f, TARGET_ABI_FMT_ptr "-" TARGET_ABI_FMT_ptr
+ " " TARGET_ABI_FMT_ptr " %c%c%c\n",
+ (abi_ptr)start, (abi_ptr)end, (abi_ptr)(end - start),
((prot & PAGE_READ) ? 'r' : '-'),
((prot & PAGE_WRITE) ? 'w' : '-'),
((prot & PAGE_EXEC) ? 'x' : '-'));
diff --git a/linux-user/elfload.c b/linux-user/elfload.c
index 7519b6bcda..e281745e48 100644
--- a/linux-user/elfload.c
+++ b/linux-user/elfload.c
@@ -4044,8 +4044,7 @@ static inline void bswap_note(struct elf_note *en) { }
/*
* Calculate file (dump) size of given memory region.
*/
-static size_t vma_dump_size(target_ulong start, target_ulong end,
- unsigned long flags)
+static size_t vma_dump_size(vaddr start, vaddr end, int flags)
{
/* The area must be readable. */
if (!(flags & PAGE_READ)) {
@@ -4238,8 +4237,8 @@ static int dump_write(int fd, const void *ptr, size_t size)
return (0);
}
-static int wmr_page_unprotect_regions(void *opaque, target_ulong start,
- target_ulong end, unsigned long flags)
+static int wmr_page_unprotect_regions(void *opaque, vaddr start,
+ vaddr end, int flags)
{
if ((flags & (PAGE_WRITE | PAGE_WRITE_ORG)) == PAGE_WRITE_ORG) {
size_t step = MAX(TARGET_PAGE_SIZE, qemu_real_host_page_size());
@@ -4260,8 +4259,8 @@ typedef struct {
size_t size;
} CountAndSizeRegions;
-static int wmr_count_and_size_regions(void *opaque, target_ulong start,
- target_ulong end, unsigned long flags)
+static int wmr_count_and_size_regions(void *opaque, vaddr start,
+ vaddr end, int flags)
{
CountAndSizeRegions *css = opaque;
@@ -4275,8 +4274,8 @@ typedef struct {
off_t offset;
} FillRegionPhdr;
-static int wmr_fill_region_phdr(void *opaque, target_ulong start,
- target_ulong end, unsigned long flags)
+static int wmr_fill_region_phdr(void *opaque, vaddr start,
+ vaddr end, int flags)
{
FillRegionPhdr *d = opaque;
struct elf_phdr *phdr = d->phdr;
@@ -4298,8 +4297,8 @@ static int wmr_fill_region_phdr(void *opaque, target_ulong start,
return 0;
}
-static int wmr_write_region(void *opaque, target_ulong start,
- target_ulong end, unsigned long flags)
+static int wmr_write_region(void *opaque, vaddr start,
+ vaddr end, int flags)
{
int fd = *(int *)opaque;
size_t size = vma_dump_size(start, end, flags);
diff --git a/linux-user/syscall.c b/linux-user/syscall.c
index 5826ac3adb..23b901b713 100644
--- a/linux-user/syscall.c
+++ b/linux-user/syscall.c
@@ -8135,8 +8135,8 @@ static void open_self_maps_4(const struct open_self_maps_data *d,
* Callback for walk_memory_regions, when read_self_maps() fails.
* Proceed without the benefit of host /proc/self/maps cross-check.
*/
-static int open_self_maps_3(void *opaque, target_ulong guest_start,
- target_ulong guest_end, unsigned long flags)
+static int open_self_maps_3(void *opaque, vaddr guest_start,
+ vaddr guest_end, int flags)
{
static const MapInfo mi = { .is_priv = true };
@@ -8147,8 +8147,8 @@ static int open_self_maps_3(void *opaque, target_ulong guest_start,
/*
* Callback for walk_memory_regions, when read_self_maps() succeeds.
*/
-static int open_self_maps_2(void *opaque, target_ulong guest_start,
- target_ulong guest_end, unsigned long flags)
+static int open_self_maps_2(void *opaque, vaddr guest_start,
+ vaddr guest_end, int flags)
{
const struct open_self_maps_data *d = opaque;
uintptr_t host_start = (uintptr_t)g2h_untagged(guest_start);
--
2.43.0
^ permalink raw reply related [flat|nested] 45+ messages in thread
* Re: [PATCH 12/15] accel/tcg: Use vaddr for walk_memory_regions callback
2025-04-24 1:19 ` [PATCH 12/15] accel/tcg: Use vaddr for walk_memory_regions callback Richard Henderson
@ 2025-04-24 7:05 ` Philippe Mathieu-Daudé
2025-04-24 9:05 ` Philippe Mathieu-Daudé
2025-04-25 19:44 ` Pierrick Bouvier
2 siblings, 0 replies; 45+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-04-24 7:05 UTC (permalink / raw)
To: Richard Henderson, qemu-devel; +Cc: Anton Johansson
On 24/4/25 03:19, Richard Henderson wrote:
> Use vaddr instead of target_ulong. At the same time,
> use int instead of unsigned long for flags, to match
> page_set_flags().
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> include/user/page-protection.h | 4 +---
> accel/tcg/user-exec.c | 10 +++++-----
> linux-user/elfload.c | 19 +++++++++----------
> linux-user/syscall.c | 8 ++++----
> 4 files changed, 19 insertions(+), 22 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH 12/15] accel/tcg: Use vaddr for walk_memory_regions callback
2025-04-24 1:19 ` [PATCH 12/15] accel/tcg: Use vaddr for walk_memory_regions callback Richard Henderson
2025-04-24 7:05 ` Philippe Mathieu-Daudé
@ 2025-04-24 9:05 ` Philippe Mathieu-Daudé
2025-04-25 19:44 ` Pierrick Bouvier
2 siblings, 0 replies; 45+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-04-24 9:05 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
On 24/4/25 03:19, Richard Henderson wrote:
> Use vaddr instead of target_ulong. At the same time,
> use int instead of unsigned long for flags, to match
> page_set_flags().
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> include/user/page-protection.h | 4 +---
> accel/tcg/user-exec.c | 10 +++++-----
> linux-user/elfload.c | 19 +++++++++----------
> linux-user/syscall.c | 8 ++++----
> 4 files changed, 19 insertions(+), 22 deletions(-)
>
> diff --git a/include/user/page-protection.h b/include/user/page-protection.h
> index 1de72e31e6..55aa05ce24 100644
> --- a/include/user/page-protection.h
> +++ b/include/user/page-protection.h
> @@ -88,9 +88,7 @@ target_ulong page_find_range_empty(target_ulong min, target_ulong max,
> __attribute__((returns_nonnull))
> void *page_get_target_data(target_ulong address);
>
> -typedef int (*walk_memory_regions_fn)(void *, target_ulong,
> - target_ulong, unsigned long);
> -
> +typedef int (*walk_memory_regions_fn)(void *, vaddr, vaddr, int);
> int walk_memory_regions(void *, walk_memory_regions_fn);
Noticed while bisecting another work based on your series, we need
to include "exec/vaddr.h" in this patch (not the following one).
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH 12/15] accel/tcg: Use vaddr for walk_memory_regions callback
2025-04-24 1:19 ` [PATCH 12/15] accel/tcg: Use vaddr for walk_memory_regions callback Richard Henderson
2025-04-24 7:05 ` Philippe Mathieu-Daudé
2025-04-24 9:05 ` Philippe Mathieu-Daudé
@ 2025-04-25 19:44 ` Pierrick Bouvier
2 siblings, 0 replies; 45+ messages in thread
From: Pierrick Bouvier @ 2025-04-25 19:44 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
On 4/23/25 18:19, Richard Henderson wrote:
> Use vaddr instead of target_ulong. At the same time,
> use int instead of unsigned long for flags, to match
> page_set_flags().
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> include/user/page-protection.h | 4 +---
> accel/tcg/user-exec.c | 10 +++++-----
> linux-user/elfload.c | 19 +++++++++----------
> linux-user/syscall.c | 8 ++++----
> 4 files changed, 19 insertions(+), 22 deletions(-)
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
^ permalink raw reply [flat|nested] 45+ messages in thread
* [PATCH 13/15] accel/tcg: Use vaddr in user/page-protection.h
2025-04-24 1:19 [PATCH 00/15] accel/tcg: Compile tb-maint.c twice Richard Henderson
` (11 preceding siblings ...)
2025-04-24 1:19 ` [PATCH 12/15] accel/tcg: Use vaddr for walk_memory_regions callback Richard Henderson
@ 2025-04-24 1:19 ` Richard Henderson
2025-04-25 19:45 ` Pierrick Bouvier
2025-04-24 1:19 ` [PATCH 14/15] include/exec: Move tb_invalidate_phys_range to translation-block.h Richard Henderson
2025-04-24 1:19 ` [PATCH 15/15] accel/tcg: Compile tb-maint.c twice Richard Henderson
14 siblings, 1 reply; 45+ messages in thread
From: Richard Henderson @ 2025-04-24 1:19 UTC (permalink / raw)
To: qemu-devel
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/user/page-protection.h | 18 ++++++------
accel/tcg/user-exec.c | 51 ++++++++++++++++------------------
2 files changed, 32 insertions(+), 37 deletions(-)
diff --git a/include/user/page-protection.h b/include/user/page-protection.h
index 55aa05ce24..86143212fd 100644
--- a/include/user/page-protection.h
+++ b/include/user/page-protection.h
@@ -12,13 +12,12 @@
#error Cannot include this header from system emulation
#endif
-#include "cpu-param.h"
-#include "exec/target_long.h"
+#include "exec/vaddr.h"
#include "exec/translation-block.h"
int page_unprotect(CPUState *cpu, tb_page_addr_t address, uintptr_t pc);
-int page_get_flags(target_ulong address);
+int page_get_flags(vaddr address);
/**
* page_set_flags:
@@ -31,9 +30,9 @@ int page_get_flags(target_ulong address);
* The flag PAGE_WRITE_ORG is positioned automatically depending
* on PAGE_WRITE. The mmap_lock should already be held.
*/
-void page_set_flags(target_ulong start, target_ulong last, int flags);
+void page_set_flags(vaddr start, vaddr last, int flags);
-void page_reset_target_data(target_ulong start, target_ulong last);
+void page_reset_target_data(vaddr start, vaddr last);
/**
* page_check_range
@@ -45,7 +44,7 @@ void page_reset_target_data(target_ulong start, target_ulong last);
* Return false if any page is unmapped. Thus testing flags == 0 is
* equivalent to testing for flags == PAGE_VALID.
*/
-bool page_check_range(target_ulong start, target_ulong last, int flags);
+bool page_check_range(vaddr start, vaddr last, int flags);
/**
* page_check_range_empty:
@@ -57,7 +56,7 @@ bool page_check_range(target_ulong start, target_ulong last, int flags);
* The memory lock must be held so that the caller will can ensure
* the result stays true until a new mapping can be installed.
*/
-bool page_check_range_empty(target_ulong start, target_ulong last);
+bool page_check_range_empty(vaddr start, vaddr last);
/**
* page_find_range_empty
@@ -71,8 +70,7 @@ bool page_check_range_empty(target_ulong start, target_ulong last);
* The memory lock must be held, as the caller will want to ensure
* the returned range stays empty until a new mapping can be installed.
*/
-target_ulong page_find_range_empty(target_ulong min, target_ulong max,
- target_ulong len, target_ulong align);
+vaddr page_find_range_empty(vaddr min, vaddr max, vaddr len, vaddr align);
/**
* page_get_target_data(address)
@@ -86,7 +84,7 @@ target_ulong page_find_range_empty(target_ulong min, target_ulong max,
* e.g. with the munmap system call.
*/
__attribute__((returns_nonnull))
-void *page_get_target_data(target_ulong address);
+void *page_get_target_data(vaddr address);
typedef int (*walk_memory_regions_fn)(void *, vaddr, vaddr, int);
int walk_memory_regions(void *, walk_memory_regions_fn);
diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c
index 25d86567e7..43d005e24e 100644
--- a/accel/tcg/user-exec.c
+++ b/accel/tcg/user-exec.c
@@ -161,7 +161,7 @@ typedef struct PageFlagsNode {
static IntervalTreeRoot pageflags_root;
-static PageFlagsNode *pageflags_find(target_ulong start, target_ulong last)
+static PageFlagsNode *pageflags_find(vaddr start, vaddr last)
{
IntervalTreeNode *n;
@@ -169,8 +169,7 @@ static PageFlagsNode *pageflags_find(target_ulong start, target_ulong last)
return n ? container_of(n, PageFlagsNode, itree) : NULL;
}
-static PageFlagsNode *pageflags_next(PageFlagsNode *p, target_ulong start,
- target_ulong last)
+static PageFlagsNode *pageflags_next(PageFlagsNode *p, vaddr start, vaddr last)
{
IntervalTreeNode *n;
@@ -215,14 +214,14 @@ static int dump_region(void *opaque, vaddr start, vaddr end, int prot)
/* dump memory mappings */
void page_dump(FILE *f)
{
- const int length = sizeof(target_ulong) * 2;
+ const int length = sizeof(abi_ptr) * 2;
fprintf(f, "%-*s %-*s %-*s %s\n",
length, "start", length, "end", length, "size", "prot");
walk_memory_regions(f, dump_region);
}
-int page_get_flags(target_ulong address)
+int page_get_flags(vaddr address)
{
PageFlagsNode *p = pageflags_find(address, address);
@@ -245,7 +244,7 @@ int page_get_flags(target_ulong address)
}
/* A subroutine of page_set_flags: insert a new node for [start,last]. */
-static void pageflags_create(target_ulong start, target_ulong last, int flags)
+static void pageflags_create(vaddr start, vaddr last, int flags)
{
PageFlagsNode *p = g_new(PageFlagsNode, 1);
@@ -256,13 +255,13 @@ static void pageflags_create(target_ulong start, target_ulong last, int flags)
}
/* A subroutine of page_set_flags: remove everything in [start,last]. */
-static bool pageflags_unset(target_ulong start, target_ulong last)
+static bool pageflags_unset(vaddr start, vaddr last)
{
bool inval_tb = false;
while (true) {
PageFlagsNode *p = pageflags_find(start, last);
- target_ulong p_last;
+ vaddr p_last;
if (!p) {
break;
@@ -301,8 +300,7 @@ static bool pageflags_unset(target_ulong start, target_ulong last)
* A subroutine of page_set_flags: nothing overlaps [start,last],
* but check adjacent mappings and maybe merge into a single range.
*/
-static void pageflags_create_merge(target_ulong start, target_ulong last,
- int flags)
+static void pageflags_create_merge(vaddr start, vaddr last, int flags)
{
PageFlagsNode *next = NULL, *prev = NULL;
@@ -353,11 +351,11 @@ static void pageflags_create_merge(target_ulong start, target_ulong last,
#define PAGE_STICKY (PAGE_ANON | PAGE_PASSTHROUGH | PAGE_TARGET_STICKY)
/* A subroutine of page_set_flags: add flags to [start,last]. */
-static bool pageflags_set_clear(target_ulong start, target_ulong last,
+static bool pageflags_set_clear(vaddr start, vaddr last,
int set_flags, int clear_flags)
{
PageFlagsNode *p;
- target_ulong p_start, p_last;
+ vaddr p_start, p_last;
int p_flags, merge_flags;
bool inval_tb = false;
@@ -492,7 +490,7 @@ static bool pageflags_set_clear(target_ulong start, target_ulong last,
return inval_tb;
}
-void page_set_flags(target_ulong start, target_ulong last, int flags)
+void page_set_flags(vaddr start, vaddr last, int flags)
{
bool reset = false;
bool inval_tb = false;
@@ -532,9 +530,9 @@ void page_set_flags(target_ulong start, target_ulong last, int flags)
}
}
-bool page_check_range(target_ulong start, target_ulong len, int flags)
+bool page_check_range(vaddr start, vaddr len, int flags)
{
- target_ulong last;
+ vaddr last;
int locked; /* tri-state: =0: unlocked, +1: global, -1: local */
bool ret;
@@ -610,17 +608,16 @@ bool page_check_range(target_ulong start, target_ulong len, int flags)
return ret;
}
-bool page_check_range_empty(target_ulong start, target_ulong last)
+bool page_check_range_empty(vaddr start, vaddr last)
{
assert(last >= start);
assert_memory_lock();
return pageflags_find(start, last) == NULL;
}
-target_ulong page_find_range_empty(target_ulong min, target_ulong max,
- target_ulong len, target_ulong align)
+vaddr page_find_range_empty(vaddr min, vaddr max, vaddr len, vaddr align)
{
- target_ulong len_m1, align_m1;
+ vaddr len_m1, align_m1;
assert(min <= max);
assert(max <= GUEST_ADDR_MAX);
@@ -661,7 +658,7 @@ target_ulong page_find_range_empty(target_ulong min, target_ulong max,
void tb_lock_page0(tb_page_addr_t address)
{
PageFlagsNode *p;
- target_ulong start, last;
+ vaddr start, last;
int host_page_size = qemu_real_host_page_size();
int prot;
@@ -740,7 +737,7 @@ int page_unprotect(CPUState *cpu, tb_page_addr_t address, uintptr_t pc)
}
} else {
int host_page_size = qemu_real_host_page_size();
- target_ulong start, len, i;
+ vaddr start, len, i;
int prot;
if (host_page_size <= TARGET_PAGE_SIZE) {
@@ -756,7 +753,7 @@ int page_unprotect(CPUState *cpu, tb_page_addr_t address, uintptr_t pc)
prot = 0;
for (i = 0; i < len; i += TARGET_PAGE_SIZE) {
- target_ulong addr = start + i;
+ vaddr addr = start + i;
p = pageflags_find(addr, addr);
if (p) {
@@ -883,7 +880,7 @@ typedef struct TargetPageDataNode {
static IntervalTreeRoot targetdata_root;
-void page_reset_target_data(target_ulong start, target_ulong last)
+void page_reset_target_data(vaddr start, vaddr last)
{
IntervalTreeNode *n, *next;
@@ -897,7 +894,7 @@ void page_reset_target_data(target_ulong start, target_ulong last)
n != NULL;
n = next,
next = next ? interval_tree_iter_next(n, start, last) : NULL) {
- target_ulong n_start, n_last, p_ofs, p_len;
+ vaddr n_start, n_last, p_ofs, p_len;
TargetPageDataNode *t = container_of(n, TargetPageDataNode, itree);
if (n->start >= start && n->last <= last) {
@@ -921,11 +918,11 @@ void page_reset_target_data(target_ulong start, target_ulong last)
}
}
-void *page_get_target_data(target_ulong address)
+void *page_get_target_data(vaddr address)
{
IntervalTreeNode *n;
TargetPageDataNode *t;
- target_ulong page, region, p_ofs;
+ vaddr page, region, p_ofs;
page = address & TARGET_PAGE_MASK;
region = address & TBD_MASK;
@@ -956,7 +953,7 @@ void *page_get_target_data(target_ulong address)
return t->data + p_ofs * TARGET_PAGE_DATA_SIZE;
}
#else
-void page_reset_target_data(target_ulong start, target_ulong last) { }
+void page_reset_target_data(vaddr start, vaddr last) { }
#endif /* TARGET_PAGE_DATA_SIZE */
/* The system-mode versions of these helpers are in cputlb.c. */
--
2.43.0
^ permalink raw reply related [flat|nested] 45+ messages in thread
* [PATCH 14/15] include/exec: Move tb_invalidate_phys_range to translation-block.h
2025-04-24 1:19 [PATCH 00/15] accel/tcg: Compile tb-maint.c twice Richard Henderson
` (12 preceding siblings ...)
2025-04-24 1:19 ` [PATCH 13/15] accel/tcg: Use vaddr in user/page-protection.h Richard Henderson
@ 2025-04-24 1:19 ` Richard Henderson
2025-04-24 7:06 ` Philippe Mathieu-Daudé
` (2 more replies)
2025-04-24 1:19 ` [PATCH 15/15] accel/tcg: Compile tb-maint.c twice Richard Henderson
14 siblings, 3 replies; 45+ messages in thread
From: Richard Henderson @ 2025-04-24 1:19 UTC (permalink / raw)
To: qemu-devel
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/exec/exec-all.h | 4 ----
include/exec/translation-block.h | 4 ++++
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index 24383b6aba..90986152df 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -120,10 +120,6 @@ int probe_access_full_mmu(CPUArchState *env, vaddr addr, int size,
#endif /* !CONFIG_USER_ONLY */
#endif /* CONFIG_TCG */
-/* TranslationBlock invalidate API */
-void tb_invalidate_phys_range(CPUState *cpu, tb_page_addr_t start,
- tb_page_addr_t last);
-
#if !defined(CONFIG_USER_ONLY)
/**
diff --git a/include/exec/translation-block.h b/include/exec/translation-block.h
index 8b8e730561..cdce399eba 100644
--- a/include/exec/translation-block.h
+++ b/include/exec/translation-block.h
@@ -207,4 +207,8 @@ static inline void tb_set_page_addr1(TranslationBlock *tb,
#endif
}
+/* TranslationBlock invalidate API */
+void tb_invalidate_phys_range(CPUState *cpu, tb_page_addr_t start,
+ tb_page_addr_t last);
+
#endif /* EXEC_TRANSLATION_BLOCK_H */
--
2.43.0
^ permalink raw reply related [flat|nested] 45+ messages in thread
* Re: [PATCH 14/15] include/exec: Move tb_invalidate_phys_range to translation-block.h
2025-04-24 1:19 ` [PATCH 14/15] include/exec: Move tb_invalidate_phys_range to translation-block.h Richard Henderson
@ 2025-04-24 7:06 ` Philippe Mathieu-Daudé
2025-04-24 7:33 ` Philippe Mathieu-Daudé
2025-04-25 19:46 ` Pierrick Bouvier
2 siblings, 0 replies; 45+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-04-24 7:06 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
On 24/4/25 03:19, Richard Henderson wrote:
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> include/exec/exec-all.h | 4 ----
> include/exec/translation-block.h | 4 ++++
> 2 files changed, 4 insertions(+), 4 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH 14/15] include/exec: Move tb_invalidate_phys_range to translation-block.h
2025-04-24 1:19 ` [PATCH 14/15] include/exec: Move tb_invalidate_phys_range to translation-block.h Richard Henderson
2025-04-24 7:06 ` Philippe Mathieu-Daudé
@ 2025-04-24 7:33 ` Philippe Mathieu-Daudé
2025-04-24 7:36 ` Philippe Mathieu-Daudé
2025-04-25 19:46 ` Pierrick Bouvier
2 siblings, 1 reply; 45+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-04-24 7:33 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
On 24/4/25 03:19, Richard Henderson wrote:
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> include/exec/exec-all.h | 4 ----
> include/exec/translation-block.h | 4 ++++
> 2 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
> index 24383b6aba..90986152df 100644
> --- a/include/exec/exec-all.h
> +++ b/include/exec/exec-all.h
> @@ -120,10 +120,6 @@ int probe_access_full_mmu(CPUArchState *env, vaddr addr, int size,
> #endif /* !CONFIG_USER_ONLY */
> #endif /* CONFIG_TCG */
>
> -/* TranslationBlock invalidate API */
> -void tb_invalidate_phys_range(CPUState *cpu, tb_page_addr_t start,
> - tb_page_addr_t last);
> -
> #if !defined(CONFIG_USER_ONLY)
We don't need to include "exec/translation-block.h" anymore, please
remove it.
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH 14/15] include/exec: Move tb_invalidate_phys_range to translation-block.h
2025-04-24 7:33 ` Philippe Mathieu-Daudé
@ 2025-04-24 7:36 ` Philippe Mathieu-Daudé
2025-04-24 7:48 ` Philippe Mathieu-Daudé
0 siblings, 1 reply; 45+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-04-24 7:36 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
On 24/4/25 09:33, Philippe Mathieu-Daudé wrote:
> On 24/4/25 03:19, Richard Henderson wrote:
>> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
>> ---
>> include/exec/exec-all.h | 4 ----
>> include/exec/translation-block.h | 4 ++++
>> 2 files changed, 4 insertions(+), 4 deletions(-)
>>
>> diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
>> index 24383b6aba..90986152df 100644
>> --- a/include/exec/exec-all.h
>> +++ b/include/exec/exec-all.h
>> @@ -120,10 +120,6 @@ int probe_access_full_mmu(CPUArchState *env,
>> vaddr addr, int size,
>> #endif /* !CONFIG_USER_ONLY */
>> #endif /* CONFIG_TCG */
>> -/* TranslationBlock invalidate API */
>> -void tb_invalidate_phys_range(CPUState *cpu, tb_page_addr_t start,
>> - tb_page_addr_t last);
>> -
>> #if !defined(CONFIG_USER_ONLY)
>
> We don't need to include "exec/translation-block.h" anymore, please
> remove it.
To squash:
-- >8 --
diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index 90986152df3..4c5ad98c6a9 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -22,4 +22,6 @@
+#include "exec/hwaddr.h"
+#include "exec/memattrs.h"
#include "exec/mmu-access-type.h"
-#include "exec/translation-block.h"
+#include "exec/vaddr.h"
---
^ permalink raw reply related [flat|nested] 45+ messages in thread
* Re: [PATCH 14/15] include/exec: Move tb_invalidate_phys_range to translation-block.h
2025-04-24 7:36 ` Philippe Mathieu-Daudé
@ 2025-04-24 7:48 ` Philippe Mathieu-Daudé
2025-04-24 9:45 ` Philippe Mathieu-Daudé
0 siblings, 1 reply; 45+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-04-24 7:48 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
On 24/4/25 09:36, Philippe Mathieu-Daudé wrote:
> On 24/4/25 09:33, Philippe Mathieu-Daudé wrote:
>> On 24/4/25 03:19, Richard Henderson wrote:
>>> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
>>> ---
>>> include/exec/exec-all.h | 4 ----
>>> include/exec/translation-block.h | 4 ++++
>>> 2 files changed, 4 insertions(+), 4 deletions(-)
>>>
>>> diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
>>> index 24383b6aba..90986152df 100644
>>> --- a/include/exec/exec-all.h
>>> +++ b/include/exec/exec-all.h
>>> @@ -120,10 +120,6 @@ int probe_access_full_mmu(CPUArchState *env,
>>> vaddr addr, int size,
>>> #endif /* !CONFIG_USER_ONLY */
>>> #endif /* CONFIG_TCG */
>>> -/* TranslationBlock invalidate API */
>>> -void tb_invalidate_phys_range(CPUState *cpu, tb_page_addr_t start,
>>> - tb_page_addr_t last);
>>> -
>>> #if !defined(CONFIG_USER_ONLY)
>>
>> We don't need to include "exec/translation-block.h" anymore, please
>> remove it.
>
> To squash:
>
> -- >8 --
> diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
> index 90986152df3..4c5ad98c6a9 100644
> --- a/include/exec/exec-all.h
> +++ b/include/exec/exec-all.h
> @@ -22,4 +22,6 @@
>
> +#include "exec/hwaddr.h"
> +#include "exec/memattrs.h"
> #include "exec/mmu-access-type.h"
> -#include "exec/translation-block.h"
> +#include "exec/vaddr.h"
>
> ---
>
and because "exec/translation-block.h" includes "exec/cpu-common.h":
-- >8 --
diff --git a/accel/stubs/tcg-stub.c b/accel/stubs/tcg-stub.c
index b2b9881bdfb..3b76b8b17c1 100644
--- a/accel/stubs/tcg-stub.c
+++ b/accel/stubs/tcg-stub.c
@@ -13,4 +13,3 @@
#include "qemu/osdep.h"
-#include "exec/tb-flush.h"
-#include "exec/exec-all.h"
+#include "exec/cpu-common.h"
---
^ permalink raw reply related [flat|nested] 45+ messages in thread
* Re: [PATCH 14/15] include/exec: Move tb_invalidate_phys_range to translation-block.h
2025-04-24 7:48 ` Philippe Mathieu-Daudé
@ 2025-04-24 9:45 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 45+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-04-24 9:45 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
On 24/4/25 09:48, Philippe Mathieu-Daudé wrote:
> On 24/4/25 09:36, Philippe Mathieu-Daudé wrote:
>> On 24/4/25 09:33, Philippe Mathieu-Daudé wrote:
>>> On 24/4/25 03:19, Richard Henderson wrote:
>>>> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
>>>> ---
>>>> include/exec/exec-all.h | 4 ----
>>>> include/exec/translation-block.h | 4 ++++
>>>> 2 files changed, 4 insertions(+), 4 deletions(-)
>>>>
>>>> diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
>>>> index 24383b6aba..90986152df 100644
>>>> --- a/include/exec/exec-all.h
>>>> +++ b/include/exec/exec-all.h
>>>> @@ -120,10 +120,6 @@ int probe_access_full_mmu(CPUArchState *env,
>>>> vaddr addr, int size,
>>>> #endif /* !CONFIG_USER_ONLY */
>>>> #endif /* CONFIG_TCG */
>>>> -/* TranslationBlock invalidate API */
>>>> -void tb_invalidate_phys_range(CPUState *cpu, tb_page_addr_t start,
>>>> - tb_page_addr_t last);
>>>> -
>>>> #if !defined(CONFIG_USER_ONLY)
>>>
>>> We don't need to include "exec/translation-block.h" anymore, please
>>> remove it.
>>
>> To squash:
>>
>> -- >8 --
>> diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
>> index 90986152df3..4c5ad98c6a9 100644
>> --- a/include/exec/exec-all.h
>> +++ b/include/exec/exec-all.h
>> @@ -22,4 +22,6 @@
>>
>> +#include "exec/hwaddr.h"
>> +#include "exec/memattrs.h"
>> #include "exec/mmu-access-type.h"
>> -#include "exec/translation-block.h"
>> +#include "exec/vaddr.h"
>>
>> ---
>>
>
> and because "exec/translation-block.h" includes "exec/cpu-common.h":
>
> -- >8 --
> diff --git a/accel/stubs/tcg-stub.c b/accel/stubs/tcg-stub.c
> index b2b9881bdfb..3b76b8b17c1 100644
> --- a/accel/stubs/tcg-stub.c
> +++ b/accel/stubs/tcg-stub.c
> @@ -13,4 +13,3 @@
> #include "qemu/osdep.h"
> -#include "exec/tb-flush.h"
> -#include "exec/exec-all.h"
> +#include "exec/cpu-common.h"
>
> ---
FYI I'll repost this patch updated as v2.
^ permalink raw reply [flat|nested] 45+ messages in thread
* Re: [PATCH 14/15] include/exec: Move tb_invalidate_phys_range to translation-block.h
2025-04-24 1:19 ` [PATCH 14/15] include/exec: Move tb_invalidate_phys_range to translation-block.h Richard Henderson
2025-04-24 7:06 ` Philippe Mathieu-Daudé
2025-04-24 7:33 ` Philippe Mathieu-Daudé
@ 2025-04-25 19:46 ` Pierrick Bouvier
2 siblings, 0 replies; 45+ messages in thread
From: Pierrick Bouvier @ 2025-04-25 19:46 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
On 4/23/25 18:19, Richard Henderson wrote:
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> include/exec/exec-all.h | 4 ----
> include/exec/translation-block.h | 4 ++++
> 2 files changed, 4 insertions(+), 4 deletions(-)
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
^ permalink raw reply [flat|nested] 45+ messages in thread
* [PATCH 15/15] accel/tcg: Compile tb-maint.c twice
2025-04-24 1:19 [PATCH 00/15] accel/tcg: Compile tb-maint.c twice Richard Henderson
` (13 preceding siblings ...)
2025-04-24 1:19 ` [PATCH 14/15] include/exec: Move tb_invalidate_phys_range to translation-block.h Richard Henderson
@ 2025-04-24 1:19 ` Richard Henderson
2025-04-25 19:46 ` Pierrick Bouvier
14 siblings, 1 reply; 45+ messages in thread
From: Richard Henderson @ 2025-04-24 1:19 UTC (permalink / raw)
To: qemu-devel
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
accel/tcg/tb-hash.h | 3 +--
accel/tcg/tb-maint.c | 2 --
accel/tcg/meson.build | 2 +-
3 files changed, 2 insertions(+), 5 deletions(-)
diff --git a/accel/tcg/tb-hash.h b/accel/tcg/tb-hash.h
index 3bc5042d9d..f7b159f04c 100644
--- a/accel/tcg/tb-hash.h
+++ b/accel/tcg/tb-hash.h
@@ -20,8 +20,7 @@
#ifndef EXEC_TB_HASH_H
#define EXEC_TB_HASH_H
-#include "exec/cpu-defs.h"
-#include "exec/exec-all.h"
+#include "exec/vaddr.h"
#include "exec/target_page.h"
#include "exec/translation-block.h"
#include "qemu/xxhash.h"
diff --git a/accel/tcg/tb-maint.c b/accel/tcg/tb-maint.c
index cf12a28eab..512dae93bd 100644
--- a/accel/tcg/tb-maint.c
+++ b/accel/tcg/tb-maint.c
@@ -20,10 +20,8 @@
#include "qemu/osdep.h"
#include "qemu/interval-tree.h"
#include "qemu/qtree.h"
-#include "cpu.h"
#include "exec/cputlb.h"
#include "exec/log.h"
-#include "exec/exec-all.h"
#include "exec/page-protection.h"
#include "exec/mmap-lock.h"
#include "exec/tb-flush.h"
diff --git a/accel/tcg/meson.build b/accel/tcg/meson.build
index 047afa49a2..3f7b127130 100644
--- a/accel/tcg/meson.build
+++ b/accel/tcg/meson.build
@@ -8,6 +8,7 @@ tcg_ss.add(files(
'cpu-exec-common.c',
'tcg-runtime.c',
'tcg-runtime-gvec.c',
+ 'tb-maint.c',
'translator.c',
))
if get_option('plugins')
@@ -21,7 +22,6 @@ tcg_specific_ss = ss.source_set()
tcg_specific_ss.add(files(
'tcg-all.c',
'cpu-exec.c',
- 'tb-maint.c',
'translate-all.c',
))
tcg_specific_ss.add(when: 'CONFIG_USER_ONLY', if_true: files('user-exec.c'))
--
2.43.0
^ permalink raw reply related [flat|nested] 45+ messages in thread