From: Richard Henderson <richard.henderson@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>,
qemu-arm@nongnu.org, qemu-devel@nongnu.org
Cc: Vacha Bhavsar <vacha.bhavsar@oss.qualcomm.com>
Subject: Re: [PATCH 0/2] target/arm: Support SME2 in gdbstub
Date: Thu, 16 Oct 2025 14:10:53 -0700 [thread overview]
Message-ID: <e869022c-ace2-4bf4-b72a-fb1d28556fb6@linaro.org> (raw)
In-Reply-To: <20251016122132.737016-1-peter.maydell@linaro.org>
On 10/16/25 05:21, Peter Maydell wrote:
> This patchseries adds SME2 support to the gdbstub. This is
> fairly straightforward as the only thing we need to do is
> expose the new ZT0 register in the XML in the way that gdb
> documents that we should.
We're also missing TPIDR2.
According to gdb/features/aarch64-tls.c, "org.gnu.gdb.aarch64.tls" should contain 2
registers, tpidr and tpidr2. Apparently the second is optional, and we should have been
providing the "tls" with just tpidr all along.
r~
prev parent reply other threads:[~2025-10-16 21:11 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-16 12:21 [PATCH 0/2] target/arm: Support SME2 in gdbstub Peter Maydell
2025-10-16 12:21 ` [PATCH 1/2] target/arm: Implement SME2 support " Peter Maydell
2025-10-16 21:17 ` Richard Henderson
2025-10-17 14:14 ` Peter Maydell
2025-10-16 12:21 ` [PATCH 2/2] tests/tcg/aarch64: Add test case for SME2 gdbstub registers Peter Maydell
2025-10-16 21:19 ` Richard Henderson
2025-10-17 15:11 ` Peter Maydell
2025-10-16 21:10 ` Richard Henderson [this message]
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