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([2602:ae:1598:4c01:c13a:d73:4f88:3654]) by smtp.gmail.com with ESMTPSA id a24-20020a62e218000000b00642f1e03dc1sm6043897pfi.174.2023.05.23.08.06.57 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 23 May 2023 08:06:57 -0700 (PDT) Message-ID: Date: Tue, 23 May 2023 08:06:55 -0700 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.11.0 Subject: Re: [PATCH] target/arm: Explicitly select short-format FSR for M-profile Content-Language: en-US To: Peter Maydell , qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: qemu-stable@nongnu.org References: <20230523131726.866635-1-peter.maydell@linaro.org> From: Richard Henderson In-Reply-To: <20230523131726.866635-1-peter.maydell@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::42f; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42f.google.com X-Spam_score_int: -21 X-Spam_score: -2.2 X-Spam_bar: -- X-Spam_report: (-2.2 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.089, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 5/23/23 06:17, Peter Maydell wrote: > For M-profile, there is no guest-facing A-profile format FSR, but we > still use the env->exception.fsr field to pass fault information from > the point where a fault is raised to the code in > arm_v7m_cpu_do_interrupt() which interprets it and sets the M-profile > specific fault status registers. So it doesn't matter whether we > fill in env->exception.fsr in the short format or the LPAE format, as > long as both sides agree. As it happens arm_v7m_cpu_do_interrupt() > assumes short-form. > > In compute_fsr_fsc() we weren't explicitly choosing short-form for > M-profile, but instead relied on it falling out in the wash because > arm_s1_regime_using_lpae_format() would be false. This was broken in > commit 452c67a4 when we added v8R support, because we said "PMSAv8 is > always LPAE format" (as it is for v8R), forgetting that we were > implicitly using this code path on M-profile. At that point we would > hit a g_assert_not_reached(): > ERROR:../../target/arm/internals.h:549:arm_fi_to_lfsc: code should not be reached > > #7 0x0000555555e055f7 in arm_fi_to_lfsc (fi=0x7fffecff9a90) at ../../target/arm/internals.h:549 > #8 0x0000555555e05a27 in compute_fsr_fsc (env=0x555557356670, fi=0x7fffecff9a90, target_el=1, mmu_idx=1, ret_fsc=0x7fffecff9a1c) > at ../../target/arm/tlb_helper.c:95 > #9 0x0000555555e05b62 in arm_deliver_fault (cpu=0x555557354800, addr=268961344, access_type=MMU_INST_FETCH, mmu_idx=1, fi=0x7fffecff9a90) > at ../../target/arm/tlb_helper.c:132 > #10 0x0000555555e06095 in arm_cpu_tlb_fill (cs=0x555557354800, address=268961344, size=1, access_type=MMU_INST_FETCH, mmu_idx=1, probe=false, retaddr=0) > at ../../target/arm/tlb_helper.c:260 > > The specific assertion changed when commit fcc7404eff24b4c added > "assert not M-profile" to arm_is_secure_below_el3(), because the > conditions being checked in compute_fsr_fsc() include > arm_el_is_aa64(), which will end up calling arm_is_secure_below_el3() > and asserting before we try to call arm_fi_to_lfsc(): > > #7 0x0000555555efaf43 in arm_is_secure_below_el3 (env=0x5555574665a0) at ../../target/arm/cpu.h:2396 > #8 0x0000555555efb103 in arm_is_el2_enabled (env=0x5555574665a0) at ../../target/arm/cpu.h:2448 > #9 0x0000555555efb204 in arm_el_is_aa64 (env=0x5555574665a0, el=1) at ../../target/arm/cpu.h:2509 > #10 0x0000555555efbdfd in compute_fsr_fsc (env=0x5555574665a0, fi=0x7fffecff99e0, target_el=1, mmu_idx=1, ret_fsc=0x7fffecff996c) > > Avoid the assertion and the incorrect FSR format selection by > explicitly making M-profile use the short-format in this function. > > Fixes: 452c67a42704 ("target/arm: Enable TTBCR_EAE for ARMv8-R AArch32")a > Resolves:https://gitlab.com/qemu-project/qemu/-/issues/1658 > Cc:qemu-stable@nongnu.org > Signed-off-by: Peter Maydell > --- > target/arm/tcg/tlb_helper.c | 13 +++++++++++-- > 1 file changed, 11 insertions(+), 2 deletions(-) Reviewed-by: Richard Henderson r~